|
Profile |
|
|
| Name and Affiliation |
Atshushi Iwata
iwa dsl.hiroshima-u.ac.jp
Professor
Department of Semiconductor Electronics and Integration Sciences
Graduate school of Advanced Sciences of Matter
Hiroshima University |
| Education and Professional Background |
| 1968.3. |
BE degree form Electronic Engineering, Nagoya University |
| 19703. |
ME degree form Electronic engineering, Nagoya University |
| 1970.4. |
Musashino Electrical Communication Laboratory, NTTPC |
| 1984.2. |
Director of research section, Atsugi Electrical communication Laboratory, NTTPC |
| 1991.2. |
Research manager of LSI Laboratory, NTT |
| 1993.8. |
Manager of semiconductor division, NTT Electronics Corp |
| 1994.4. |
Director Engineering from Nagoya University |
| 1999.4. |
Professor, Hiroshima University |
| 2001.4. |
Director of Research Center for Nano-devices and Systems, Hiroshima University |
|
| Academic Societies |
Institute of Electrical and Electronics Engineers (IEEE)ÅA
Institute of Electronics, Information Communication Engineer
Neural Network Society
|
| Major Achievement |
1. We proposed high performance stable higher-order delta-sigma AD conversion technique (MASH) which achieved 16bit accuracy. CMOS MASH AD and DA converters were applied to almost all digital audio equipments (ISSCC1987)
2. We have developed Analog-digital merged Information processing circuits and image associative processor (ISSCC1997, 2000) utilizing parallel arithmetic circuits using pulse width and phase modulation.
3. We have developed Analysis and measurement techniques fro substrate crosstalk noise in AD mixed LSI. We proposed low noise logic circuits (ISSCC2000)
4. Opto-Electronic merged Integrated circuits (Ultra Optoelectronic Integrated Circuit)
5. Nonlinear circuits and its application to neural networks and Image processing
|
| Important Publications |
| 1. |
Yasuyuki Matsuya, Kuniharu Uchimura and Atsushi Iwata,
A 16-bit Oversampling A-to-D Conversion Technology Using Triple-Integration Noise Shaping
IEEE J. of Solid-State Circuits, Vol. SC-22, No. 6, pp. 921-929, (1987)
|
| 2.Å@ |
Kuniharu Uchimura, Toshio Hayashi, Tadakatsu Kimura and Atsushi Iwata,
Oversampling A-to-D and D-to-A Converters with Multi-stage Noise Shaping Modulators
IEEE Trans. ASSP, Vol. 36, No. 12, pp. 1899-1905, (1988)
|
| 3. |
Atsushi Iwata and Izuo Hayashi ,
Optical Interconnections as a New LSI Technology
IEICE Trans. Electron. Vol. E76-C, No. 1, pp. 90-99, (1993)
|
| 4. |
Atsushi Iwata and Makoto Nagata,
A Concept of Analog-Digital merged Circuit Architecture for Future VLSI's
IEICE Trans. Fundamentals of Electronics, Communications and Computer Sciences Vol. E79-A, No.2, pp.145-157, (Feb. 1996)
|
| 5. |
M. Nagata, J. Funakoshi and
A. Iwata ,
A PWM Signal Processing Core Circuit Based on
a Switched Current Integration Technique
IEEE Journal of Solid-State Circuits, Vol.33, No.1, pp.53-59, (Jan. 1998)Å@ |
| 6. |
M. Nagata, J. Funakoshi and A. Iwata ,
A PWM Signal Processing Core Circuit Based on a Switched Current Integration Technique
IEEE Journal of Solid-State Circuits, Vol.33, No.1, pp.53-59, (Jan. 1998)
|
| 7. |
Astushi Iwata, T. Morie, and M. Nagata,
Merged Analog-Digital Circuits Using Pulse Modulation for Intelligent SoC Applications (Invited)
IEICE Trans. Fundamentals, Vol. E84-A, No. 2, pp. 486-496, 2001.
|
| 8. |
M. Nagata, J. Nagai, K. Hijikata, T. Morie, and A. Iwata,
Physical Design Guides for Substrate Noise Reduction in CMOS Digital Circuits
IEEE J. Solid-State Circuits, Vol. 36, No. 3, pp. 539-549, March 2001.
|
|
| Laboratory Page |
http://www.dsl.hiroshima-u.ac.jp/ |
| Personal Page |
http://www.dsl.hiroshima-u.ac.jp/~iwa/ |
|
|
|
|
|
COE Program