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Profile |
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| Name and Affiliation |
Hideo Sunami
sunami sxsys.hiroshima-u.ac.jp
Hiroshima University
Research Center for Nanodevices and Systems
Professor
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| Education and Professional Background |
| 1969 |
M. S. E. E. from Tohoku University |
| 1969-1998Å° |
Central Research Laboratory, Hitachi Ltd. (1990-0996 Semiconductor Division)
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| 1973-1974 |
Research Associate, Stanford Electronics laboratories, Stanford University |
1998
present |
Professor, Research Center for Nanodevices and Systems |
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| Academic Societies |
Japan Society of Applied Physics, The Institute of Electronics, Information and Communication Engineers(Fellow), The Institute of Electric and Electronics Engineers(Fellow) |
| World Class Research Results |
• Development of DRAM double-polysilicon gate structute
• Invension and the development of trench-capacitor DRAM cell
1985 IEEE Paul Rappaport Award
1991 IEEE Cledo Brunetti Award
1998 IEE Fellow
1998 Tokyo Mayor’s Invention Award
2003 IEICE Fellow
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| Pioneering Research Results |
| Invention of three-dimensional MOS devices as related to the COE |
| Japanese patent |
No. 13443866 (issued in June 1975) |
| US opatents |
No. 4937641(issued in September 1983)
No. 13443866(issued in December 1983)
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| Industrial and Nation-wide Cooperation |
Technical Advisor of Consortium for Advanced Semiconductor Materials and Related Technologies |
| Important Publications |
| 1. |
H. Sunami, Y. Itoh, and K. Satoh, "Stress and Thermal Expansion Coefficient of Chemica1-Vapor-Deposited Glass Films," J. Appl. Phys. Vol. 41, No. 13, pp. 5115-5117, 1970. (27 times) |
| 2.Å@ |
H. Sunami, Kure, N. Hashimoto, K. Itoh, T. Toyabe, and S. Asai, "A Corrugated Capacitor Cell (CCC) for Megabit Dynamic MOS Memories," IEDM Tech. Dig., pp. 806-808, 1982. (59 times) |
| 3. |
H. Sunami, T. Kure, N. Hashimoto, T. Toyabe, and S. Asai, "A Corrugated Capacitor Cell (CCC) for Megabit Dynamic MOS Memories," IEEE Elec. Dev. Lett., EDL-4, pp. 90-91, 1983.: IEEE Paul Rappaport Award (30 times) |
| 4. |
H. Sunami, T. Kure, N. Hashimoto, T. Toyabe, and S. Asai, "A Corrugated Capacitor Cell (CCC)," IEEE Trans. Elec. Devices, ED-31, pp. 746-753, 1984. (41 times) |
| 5. |
K. Itoh, R. Hori, J. Etoh, S. Asai, N. Hashimoto, K. Yagi, and H. Sunami, "An Experimental 1Mbit DRAM with On-Chip Voltage Limiter," ISSCC, pp. 282-283, 1984. (38 times) |
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(citation number at Dec. 2000 on database of National Institute of Informatics). |
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| Laboratory Page |
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| Personal Page |
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COE Program