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2004 (2004 April - 2005 March)

  1. Advanced device process and material technologies for ULSI
  2. Self assembling technique and quantum structure
  3. Technologies for intelligent systems

1. Advanced device, process, and material technologies for ULSI

1.1 Fabrication techniques for scaled MOS devices

[04-1] T. Eto and K. Shibahara, "Precise Depth Profiling of Sub-keV Implanted Arsenic," Ext. Abst. Int. Conf. on Solid State Devices and Materials (SSDM2004), pp. 532-533, 2004.

[04-2] K. Sano, M. Hino, N. Ooishi, and K. Shibahara, " Workfunction Tuning Using Various Impurities for Fully Silicided NiSi Gate," Ext. Abst. Int. Conf. on Solid State Devices and Materials (SSDM2004), pp. 456-457, 2004.

[04-3] E. Takii, T. Eto, K. Kurobe, A. Matsuno, and K. Shibahara, "Merits and Demerits of light absorber for Ultra shallow junction formation by green laser annealing," Int. Conf. on Ion Implantation Technology (IIT2004), p. 63, 2004.

[04-4] K. Shibahara, K. Kurobe and T. Eto, "Sub-20-nm Junction Formation by Heat-Assited　LaserAnnealing," Proceedings of 2004 Korea-Japan Joint Workshop on Advanced　Semiconductor　Processes and Equipments (ASPE2004), pp. 162-165.

[04-5] M. Ooka and S. Yokoyama, "SiO2 Hole Etching Using Perfluorocarbon Alternative Gas with Small Global Greenhouse Effect," Jpn. J. Appl. Phys., Vol. 43, No. 6A, pp. 3586-3589, 2004.

[04-6] S. Yokoyama, "Fabrication Technology for 26 nm Si MOS Transistors," The 1st International　Workshop on Nanoscale Semiconductor Devices (Seoul, May 18-19, 2004), pp.105-124, (Invited).

[04-7] A. Katakami, K. Kobayashi, and H. Sunami, "A High-Aspect Ratio Silicon Gate Formation Technique for Beam-Channel MOS Transistor with Impurity-Enhanced Oxidation," Jpn. J. Appl. Phys., Vol. 43, No. 4B, pp. 2145-2150, April 2004.

[04-8] K. Kobayashi, T. Eto, K. Okuyama, K. Shibahara, and H. Sunami, "An Impurity-Enhanced Oxidation Assisted Doping Profile Evaluation for Three-Dimensional and Vertical-Channel Transistors," Ext. Abst. of International Symp. on Solid State Devices and Materials, Abs., No. B-6-3, pp. 208-209, Tokyo, Sept. 15-17, 2004.

[04-9] M. Kawai, K. Endo, T. Tabei, and H. Sunami, "An Experimental Analysis of 1.55-μm Infrared Light Propagation in Integrated SOI Strucutre," Ext. Abst. of International Symp. on Solid State Devices and Materials, Abs. No. P7-1, pp. 556-557, Tokyo, Sept. 15-17, 2004.

[04-10] H. Sunami, T. Furukawa, and T. Masuda, "A three-dimensional MOS transistor formation technique with crystallographic orientation-dependent TMAH etchat," Sensors and Actuators A 111, pp. 310-316, 2004.

[04-11] 角南英夫共著, "第1章: ULSIの将来展望と高分子材料への期待," マイクロエレクトロニクスにおける高分子材料(（社）高分子学会編)、（社）エヌ・ティー・エス, pp. 3-36, 2004年7月2日.

[04-12] H. Sunami, K. Kobayashi, and S. Matsumura, "Integrated Power Transistor Application of Three-Dimensional Sidewall-Channel MOS Transistor," Proc. the 7th International Conference　on Solid-State and Integrated-Circuit Technology (ICSICT2004), Abs., No. A7.3, Beijin, China, Oct. 18-21, 2004.

[04-13] H. Sunami, "Recent Activities for Nano-device and Process Technology Development in the 21st COE : Nanoelectronics for Terabit Information Processing," Tech. Dig. 2004 International Symposium on Nano Science and Technology, Tainan, Taiwan, Nov. 20-21, 2004, (invited).

[04-14] Shiyang Zhu, Anri Nakajima, Takuo Ohashi, and Hideharu Miyake, "Modified　Direct-Current Current-Voltage Method for Interface Trap Density Extraction in Metal-Oxide-Semiconductor Field-Effect-Transistor with Tunneling Gate Dielectrics at High Temperature," Jpn. J. Appl. Phys., Vol. 44, No. 2A, pp. L60-L62, Jan. 2005.

[04-15] Shiyang Zhu, Anri Nakajima, Takuo Ohashi, and Hideharu Miyake, "Abnormal enhancement of interface trap generation under dynamic oxide field stress at Mega Hz region," Appl. Phys. Lett., Vol. 86, No.8, 083501 (3 pages) Feb. 2005.

[04-16] Shiyang Zhu, Anri Nakajima, Takuo Ohashi, and Hideharu Miyake, "Interface Trap Generation Induced by Charge Pumping Current under Dynamic Oxide Field Stresses," IEEE Electron Device. Lett., Vol. 26, No.3, pp. 216-218, March 2005.

[04-17] Shiyang Zhu, Anri Nakajima, Takuo Ohashi, and Hideharu Miyake, "Interface Trap Generation on Thin SiO2 and Plasma-Nitrided SiO2 Gate Dielectrics under Static and Dynamic Stresses," Proceedings 2004 7th Int. Conf. on Solid-State and Integrated-Circuits Technology (ICSICT2004) (Beijing, October 18-21, 2004), pp. 828-831.

[04-18] H. Murakami, Y. Moriwaki, M. Fujitake, D. Azuma, S. Higashi and S. Miyazaki , "Characterization of Atom Diffusion in Polycrystalline Si/SiGe/Si Stacked Gate," Ext. Abst. of 2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (Nagasaki, June 30-July 2, 2004), pp. 189-193 [B6.3], 2004.

[04-19] W. Mizubayashi, Y. Yoshida, H. Murakami, S. Miyazaki and M. Hirose, "Statistical Analysis of Soft and Hard Breakdown in 1.9-4.8nm-thick Gate Oxides," IEEE Electron Device Lett., Vol. 25 No. 5, pp. 305-307, 2004.

[04-20] W. Mizubayashi and S. Miyazaki, "Analysis of Soft Breakdown of 2.6-4.9nm-Thick Gate Oxides," Jpn. J. Appl. Phys., Vol. 43 No. 10, pp. 6925-6929, 2004.

1.2 Evaluation and modeling techniques for scaled MOS devices

[04-21] O. Matsushima, K. Konno, M. Tanaka, K. Hara, and Miura-Mattausch, "Carrier transport in highly generated carrier concentration," Semiconductor science and technology, Vol.19, No.4 pp. S185-S187, 2004.

[04-22] D. Kitamaru, Y. Uetsuji, N. Sadachika, and M. Miura-Mattausch, "Complete surfacepotential based fully-depleted silicon-on-insulator metal-oxide-semiconductor field-effect-transistor model for circuit simulation," Jpn. J. Appl. Phys., Vol. 43, No.4B, pp. L2166-2169, 2004.

[04-23] M. Miura-Mattausch, D. Navarro, Y. Takeda, H. J. Mattausch, T. Ohguro, T. Iizuka, M. Taguchi, and S. Miyamoto, "MOSFET modeling for RF-circuit era," Proc. of the 11th Int. Conference on Mixed Design of Integrated Circuits and Systems 2004, pp. 62-66, 2004.

[04-24] N. Sadachika, Y. Uetsuji, D. Kitamaru, H. J. Mattausch, M. Miura-Mattausch, L. Weiss, U. Feldmann, and S. Baba, "Fully-depleted SOI-MOSFET modeling for circuit simulation and its application to 1/f Noise analysis," Proc. Int. Conf. Simulation Semiconductor Processes & Devices, pp. 255-258, 2004.

[04-25] D. Navarro, N. Nakayama, K. Machida, Y. Takeda, S. Chiba, H. Ueno, H. J. Mattausch, M. Miura-Mattausch, T. Ohguro, T. Iizuka, M. Taguchi, and S. Miyamoto, "Modeling of carrier transport dynamics at GHz-Frequencies for RF circuit-simulation," Proc. Int. Conf. Simulation　Semiconductor Processes & Devices, pp. 51-54, 2004.

[04-26] M. Miura-Mattausch, H. J. Mattausch, T. Ohguro, T. Iizuka, M. Taguchi, S. Kumashiro, and S.Miyamoto, "MOSFET modeling for RF-circuit simulation," Proc. of the 2004 Int. Conference on Solid-State and Integrated-Circuit Technology, pp. 1118-1122, 2004.

[04-27] K. Konno, O. Matsushima, D. Navarro, and M. Miura-Mattausch, "High frequency response of p-i-n photodiodes analyzed by an analytical model in Fourier space," Journal of Applied Physics, Vol.96, No.7, pp. 3839-3844, 2004.

[04-28] K. Konno, O. Matsushima, K. Hara, G. Suzuki, D. Navarro, and M. Miura-Mattausch, "Carrier transport model for lateral p-i-n photodiodes at high-frequency operation," Ext. Abst. Int. Conf. on Solid State Devices and Materials (SSDM2004), pp. 946-947, 2004.

[04-29] K. Hara, O. Matsushima, G. Suzuki, D. Navarro, K. Konno, Y. Isobe, and M. Miura- Mattausch, "Shot noise measurement in p-i-n diode and its analysis," Ext. Abst. Int. Conf. on Solid State Devices and Materials (SSDM2004), pp. 438-439, 2004.

[04-30] M. Miura-Mattausch, H. J. Mattausch, T. Iizuka, M. Taguchi, S. Kumashiro, and S.Miyamoto, "MOSFET model HiSIM based on surface-potential description for enabling accurate RF-CMOS design," Journal of Semiconductor Technology and Science, Vol. 4, No. 3, pp.133-140, 2004.

[04-31] M. Murakawa, M. Miura-Mattausch, T. Higuchi, "Towards automatic parameter extraction for surface-potential-based MOSFET models with the genetic algorithm," Asia and South Pacific Design Automation Conference 2005, pp. 204-207, 2005.

[04-32] M. Murakawa, M. Miura-Mattausch, S. Mimura, and T. Higuchi, "Genetic algorithm for reliable parameter extraction of complete surface-potential-based models," The 2nd International Workshop on Compact modeling, pp. 7-12, 2005.

[04-33] D. Navarro, N. Nakayama, K. Machida, Y. Takeda, M. Miura-Mattausch, H. J. Mattausch, T. Ohguro, T. Iizuka, M. Taguchi, and S. Miyamoto, "A carrier transit time delay-based non-quasi-static MOSFET model for RF circuit simulation," The 2nd　International Workshop on Compact modeling, pp. 23-27, 2005.

1.3 High-k dielectrics

[04-34] M. Sugimura, A. Ohta, H. Nakagawa, T. Shibaguchi, S. Higashi, and S. Miyazaki, "Evaluation of Electronic Defect States at Poly-Si/HfO2 interface by Photoelectron Yield Spectroscopy," Ext. Abst. of 2004 Int. Conf. on Solid State Devices and Materials (Tokyo, September 15-17, 2004), pp. 792-793 [C-9-4], 2004.

[04-35] A. Ohta, S. Miyazaki, H. Murakami, T. Kawahara, and K. Torii , "Impact of Rapid ThermalO2-Anneal on Dielectric Stack Structures of Hafnium Aluminate and Silicon Dioxide Formed on Si(100)," Ext. Abst. of 2004 Int. Workshop on DIELECTRIC THIN FILMS FOR FUTURE ULSI DEVICES: SCIENCE AND TECHNOLOGY (Tokyo, May 26-28, 2004), pp. 97-98, 2004.

[04-36] H. Nakagawa, A. Ohta, F. Takeno, S. Nagamachi, H. Murakami, S. Higashi, and S. Miyazaki, "Characterization of Interfacial Oxide Layers in Heterostructures of Hafnium Oxides Formed on NH3-nitrided Si(100)," Ext. Abst. of 2004 Int. Workshop on DIELECTRIC THIN FILMS FOR FUTURE ULSI DEVICES: SCIENCE AND TECHNOLOGY (Tokyo, May 26-28, 2004), pp. 35-36, 2004.

[04-37] A. Ohta, H. Nakagawa, H. Murakami, S. Higashi, T, Kawahara, K. Torii, and S. Miyazaki, "Impact of Rapid Thermal O2 Anneal on Dielectric Stack Structures of Hafnium Aluminate and Silicon Dioxide Formed on Si(100)," Jpn. J. Appl. Phys., Vol. 43 No. 11B, pp. 7831-7836, 2004.

[04-38] H. Nakagawa, A. Ohta, F. Takeno, S. Nagamachi, H. Murakami, S. Higashi and S. Miyazaki, "Characterization of Interfacial Oxide Layers in Heterostructures of Hafnium Oxides Formed on NH3-nitrided Si(100)," Jpn. J. Appl. Phys., Vol. 43 No. 11B, pp. 7890-7894, 2004.

[04-39] A. Ohta, M. Yamaoka and S. Miyazaki, "Photoelectron Spectroscopy of ultrathin yttrium oxide films on Si(100)," Microelec. Eng., Vol. 72, pp. 154-159, 2004.

1.4 Optical interconnects

[04-40] Y. Tanushi, M. Wake, and S. Yokoyama, "Race-Track Optical Ring Resonators with Groove Coupling," Extended Abst. Int. Conf. on Solid State Devices and Materials (SSDM2004), pp. 940-941, 2004.

[04-41] Y. Tanushi, M. Wake, K. Wakushima, M. Suzuki, and S. Yokoyama, "Technology for Ring Resonator Switches using Electro-Optic Materials," 1st International Conference on Group IV Photonics (Hong Kong, China, Sept. 29-Oct. 1, 2004), WB3.

1.5 Low-k interlayer dielectrics

[04-42] Shin-Ichiro Kuroki, Susumu Sakamoto and Takamaro Kikkawa, "A Novel Photosensitive Porous Low-k Interlayer Dielectric Film," Jpn. J. Appl. Phys., Vol. 42, pp. 1820, 2004.

[04-43] Shin-Ichiro Kuroki and Takamaro Kikkawa, "Photosensitive porous low-k interlayer dielectric film," Optics East: SPIE International Symposium, Vol. 5592, pp. 170-174, 2004.

[04-44] Shin-Ichiro Kuroki and Takamaro Kikkawa, J. Electrochem. "Characterization of Photosensitive Low-k Films Using Electron-Beam Lithography," Soc, 152(4) G281-285, 2005.

[04-45] K. Yamada, Y. Oku, N. Hata, Y. Seino, C. Negoro and T. Kikkawa, "Structural and electrical properties of ultralow-k, disordered mesoporous silica films synthesized using nonionic templates," Journal of Electrochemical Society, 151, F248-F251 , 2004.

[04-46] Takenobu Yoshino, Nobuhiro Hata and Takamaro Kikkawa, "Transient Capacitance Spectroscopy of Copper-Ion-Drifted Methylsilsesquiazane-Methylsilsesquioxane Interlayer Dielectrics," Jpn. J. Appl. Phys., Vol. 43, No. 12, pp.8026-8027, 2004.

[04-47] S. Takada, N. Hata, Y. Seino, K. Yamada, Y. Oku and T. Kikkawa, "Mechanical Property and Network Structure of Porous Silica Films," Jpn. J. Appl. Phys., Vol. 43, No.5A, pp. 2453-2456, 2004.

[04-48] M. Yamato, H. Yamada and T. Kikkawa, "Influence of Bottom Electrodes and Interface Layers on (Ba, Sr)TiO3 Thin Film Leakage Current," Jpn. J. Appl. Phys., Vol. 43, No. 8A, 2004.

[04-49] S. Kuroki, S. Sakamoto and T. Kikkawa, "A novel Photoresistive Porous Low-k Interlayer Dielectric Film," Jpn. J. Appl. Phys., Vol. 43, No. 4B, pp. 1820-1824, 2004.

[04-50] Hidenori Miyoshi, Hisanori Matsuo, Yoshiaki Oku, Hirofumi Tanaka, Kazuhiro Yamada, Noboru Mikami, Syozo Takada, Nobuhiro Hata and Takamaro Kikkawa, "Theoretical Analysis of Elastic Modulus and Dielectric Constant for Low-k Two-Dimensional Periodic Porous Silica Films," Jpn. J. Appl. Phys., Vol. 43, No. 2, pp. 498-503, 2004.

[04-51] Kazuyoshi Uera, Jun Kawahara, Hidenori Miyoshi, Nobuhiro Hata and Takamaro Kikkawa, "Molecular Orbital Calculation of the Elastic Modulus and the Dielectric Constant for Ultra Low-k Organic Polymers," Jpn. J. Appl. Phys., Vol. 43, No. 2, pp. 504-507, 2004.

[04-52] Xia Xiao, Nobuhiro Hata, Kazuhiro Yamada and Takamaro Kikkawa, "Mechanical Property Determination of Thin Porous Low-k Films by Twin-Transducer Laser Generated Surface Acoustic Waves," Jpn. J. Appl. Phys., Vol. 43, No. 2, pp. 508-513, 2004.

[04-53] Nobuhiro Hata, Chie Negoro, Kazuhiro Yamada and Takamaro Kikkawa, "Control of Pore Structures in Periodic Porous Silica Low-k Films," Jpn. J. Appl. Phys., Vol. 43, No. 4A, pp. 1323-1326, 2004.

[04-54] Chie Negoro, Nobuhiro Hata, Kazuhiro Yamada and Takamaro Kikkawa, "Nondestructive Characterization of a Series of Periodic Porous Silica Films by in situ Spectroscopic Ellipsoometry in a Vapor Cell," Jpn. J. Appl. Phys., Vol. 43, No. 4A, pp. 1327-1329, 2004.

[04-55] N. Fujii, K. Yamada, Y. Oku, N. Hata, Y. Seino, C. Negoro, T. Kikkawa, "Comparative Studies of Ultra Low-k Porous Silica Films with 2D-Hexagonal and Disordered Pore Structures," Materials Research Society Symposium Proceedings, Vol. 812, pp. 43-48, 2004.

[04-56] Y. Oku, N. Fujii, K. Kohmura, K. Yamada, N. Hata, Y. Seino, R. Ichikawa, N. Nishiyama, S.Tanaka, H. Miyashi, S. Oike, H. Tanaka, S. Takada, C. Negoro. A. Nakano, T. Ogata, T. Goto, Y. Sonoda, A. Ishikawa, T. Yoshino, H. Matsuo, K. Kinoshita, K. Ueyama and T. Kikkawa, "Characteristics of Self-Assembled Ultra-Low-k Porous Silica　Films," Electrochemical Society Fall Meeting Proceedings, Vol.2004-04, pp. 331-345, The Electrochemical Society, Inc, 2004.

[04-57] T. Ono, K. Kinoshita, T. Goto, H. Takahashi, N. Fujii, Y. Sonoda, Y. Oku, K. Kohmura, N. Hata and T. Kikkawa, "Dry Etching Damage in Porous Silica Low-k Films and its Recovery by Organosiloxane Vapor Treatment," Proceeding of Dry Process Symposium, pp. 229-233, 2004.

[04-58] A. Ishikawa, H. Matsuo and T. Kikkawa, "In-situ Electrochemical Measurement for Copper Chemical Mechanical Polishing," 2004 Electrochemical Society Fall Meeting Proceedings, p881, The Electrochemical Society, Inc.

[04-59] K. Kinoshita, A. Nakano, N. Kunimi, T. Shimoyama, J. Kawahara, H. Miyoshi, Y. Seino, Y. Takasu, R. Ichikawa, K. Komatsu, Y. Hayashi and T. Kikkawa, "Reduction of dielectric constant in organic-based low-k films deposited by plasma copolymerization," Proceedings of Advanced Metallization Conference, pp. 451-456, 2004.

1.6 Wireless interconnect technologies

[04-60] S. Watanabe, A. B. M. H. Rashid and T. Kikkawa, "Effect of High Resistivity Si substrate on Antenna Transmission Gain for On-Chip Wireless Interconnects," Jpn. J. Appl. Phys., Vol. 43, No. 4B, pp.2297-2301, 2004.

[04-61] A. B. M. H. Rashid, S. Watanabe and T. Kikkawa, "Characteristics of Si Integrated Antenna for Inter-Chip Wireless Interconnection," Jpn. J. Appl. Phys., Vol. 43, No. 4B, pp. 2283-2287, 2004.

[04-62] S. Watanabe, K. Kimoto and T. Kikkawa, "Transient Characteristics of Integrated Dipole Antennas on Silicon for Ultra Wideband Wireless Interconnects," Proc. IEEE APS International Symposium and USNC/URSI National Radio Science Meeting., Vol. 3, pp. 2277-2280, Monterey, California, June 20-25, 2004.

[04-63] K. Kimoto, S. Watanabe, T. Kikkawa, P. S. Hall, and Y. Yuan, "Characteristics of Fractal Dipole Antennas Integrated on Si for ULSI Wireless Interconnects," Proc. IEEE APS International Symposium and USNC/URSI National Radio Science Meeting., Vol. 4, pp. 3437-3440, Monterey, California, June 20-25, 2004.

[04-64] K. Kimoto, S. Watanabe, A. B. M. H. Rashid and T. Kikkawa, "Inter-chip Signal Transmission using Si Integrated Antenna," Proc. IEICE 2004 International Symposium on Antennas and Propagation, Vol. 1, pp. 109-112, Sendai, August 17-21, 2004.

[04-65] K. Kimoto and T. Kikkawa, "Transmission characteristics of Gaussian monocycle pulses for interchip wireless interconnection using integrated antennas," Ext. Abst. Int. Conf. on Solid State Devices and Materials (SSDM2004), pp.304-305, Tokyo, September 15-17, 2004.

[04-66] P.K. Saha, N Sasaki and T. Kikkawa, "A CMOS UWB Transmitter for Intra/Inter-chip wireless communication," IEEE International Symposium on Spread Spectrum Techniques and Applications (ISSSTA' 2004), pp. 962-966, Sydney Australia, August 30 - September 2, 2004.

[04-67] P.K. Saha, N Sasaki and T. Kikkawa, "A CMOS Monocycle Pulse Generation Circuit of UWB Transmitter for Intra/Inter Chip Wireless Interconnection," Ext. Abst. Int. Conf. on Solid State Devices and Materials (SSDM2004), pp. 394-395, Tokyo, September 15 - 17, 2004.

1.7 CVD and contamination/particle control

[04-68] M. Suzuki, T. Tabei, S. Yokoyama, K. Miyamoto, T. Wada, and T. Fujii, "Evaluation of Front-Opening Unified Pod with Attached　UV/Photocatlyst Cleaning Unit," Jpn. J. Appl. Phys., Vol. 44, No. 2, pp.1130-1131, 2005.

[04-69] M. Suzuki　and S. Yokoyama, "Mechanism of Anomalous Behavior of Metal-Oxide-Semiconductor Capacitors Contaminated with Organic Molecules," Jpn. J. Appl. Phys., Vol. 44, No.3, pp. 1208-1212, 2005.

[04-70] M. Suzuki and S. Yokoyama, "Anomalous Behavior of Interface Traps of Si MOS Capacitors Contaminated with Organic Molecules," Ext. Abst. Int. Conf. on Solid State Devices and Materials (SSDM2004), pp. 530-531, 2004.

[04-71] Y. Azuma, M. Shimada, and K. Okuyama, "The Synthesis of Monodisperse Ultrapure Gallium Nitride Nanoparticles by MOCVD," Chemical Vapor Deposition, Vol. 10, No. 1, pp. 11-13, 2004.

[04-72] F. Iskandar, M. Abdullah, H. Yoden, and K. Okuyama, "Silica Films Containing Ordered Pores Prepared by Dip Coating of Silica Nanoparticles and Polystyrene Beads Colloidal Mixture," J. Sol-Gel Sci. Technol., Vol. 29, No. 1, pp. 41-47, 2004.

[04-73] K. Katayama, S. Kitao, M. Shimada, and K. Okuyama, "Measurement of Cigarette Side-stream Smoke using In-Situ 2-D Polarization-Sensitive Laser Light Scattering Method," J. Aerosol Res., Vol. 19, No. 1, pp. 50-57, 2004.

[04-74] W. N. Wang, Y. Itoh, I. W. Lenggoro, and K. Okuyama, "Nickel and Nickel Oxide Nanoparticles Prepared from Nickel Nitrate Hexahydrate by a Low Pressure Spray Pvrolvsis," Mater. Sci. Eng. B, Vol. 111, No. 1, pp. 69-76, 2004.

[04-75] S. Okamura, M. Shimada and K. Okuyama, "Adsorption and Desorption of Dibutyl Phthalate on Si Surface Measured in Controlled Atmosphere using Quartz Crystal Microbalance Method," Jpn. J. Appl. Phys., Vol. 43, No. 5A, pp. 2661-2666, 2004.

[04-76] Y. Itoh, T. O. Kim, M. Shimada, K. Okuyama, and I. Matsui, "One-step Preparation of BaTiO3 Nanoparticles by Liquid Source Chemical Vapor Deposition," J. Chem. Eng. Jpn., Vol. 37, No.3, pp.454-460, 2004.

[04-77] Y. Itoh, M. Abdullah, and K. Okuyama, "Direct Preparation of Non-Agglomerated Indium Tin Oxide Nanoparticles Using Various Spray Pyrolysis Methods," J. Mater. Res., Vol. 19, No. 4, pp. 1077-1086, 2004.

[04-78] S. Okamura, M. Shimada, and K. Okuyama, "Simultaneous Observation of Molecular Contamination Behavior in Semiconductor Clean room Using Quartz Crystal Microbalance," Jpn. J. Appl. Phys., Vol. 43, No. 7A, pp. 4135-4140, 2004.

[04-79] M. Abdullah, F. Iskandar, S. Shibamoto, T. Ogi, and K. Okuyama, "Preparation of Oxide Particles with Ordered Macropores by Colloidal Templating and Spray Pyrolysis," Acta Mater., Vol. 52, No. 17, pp. 5151-5156, 2004.

[04-80] C. S. Kim, K. Okuyama, K. Nakaso, and M. Shimada, "Direct Measurement of Nucleation and Growth Modes in Titania Nanoparticles Generation by a CVD Method," J. Chem. Eng. Jpn., Vol. 37, No. 11, pp. 1379-1389, 2004.

[04-81] S. Okamura, M. Shimada, and K. Okuyama, "Observation of Adsorption Phenomena of Dibutyl Phthalate Molecules on Si Surface using Quartz Crystal Microbalance Method," Jpn. J. Appl. Phys., Part 1, Vol. 43, No. 8A, pp. 5496-5500, 2004.

[04-82] N. Iida, H. Naito, H. Ito, K. Nakayama, I. W. Lenggoro, and K. Okuyama, "Spray Pyrolysis Synthesis and Evaluation of Fine Bimetallic Au-Pd Particles," J. Ceram. Soc. Jpn., Vol. 112, No. 7, pp. 405-408, 2004.

[04-83] H. Setyawan, M. Shimada, Y. Hayashi, K. Okuyama, and S. Yokoyama, "Particle Formation and Trapping Behavior in a TEOS/O2 Plasma and Their Effects on Contamination of a Si Wafer," Aerosol Sci. Tech., Vol. 38, No. 2, pp. 120-127, 2004.

[04-84] L. Gradon, S. Janeczko, M. Abdullah, F. Iskandar, and K. Okuyama, "Self-Organization Kinetics of Mesoporous Nanostructured Partciles," AIChE J., Vol. 50, No. 10, pp. 2583-2593, 2004.

[04-85] Y. S. Chung, J. S. Lim, S. B. Park, and K. Okuyama, "Templated Synthesis of Silica Hollow Particles By Using Spray Pyrolysis," J. Chem. Eng. Jpn., Vol. 37, No. 9, pp. 1099-1104, 2004.

[04-86] M. Abdullah, F. Iskandar, S. Shibamoto, T. Ogi, and K. Okuyama, "Preparation of Oxide Particles with Ordered Macropores by Colloidal Templating and Spray Pyrolysis," Acta Mater., Vol. 52, No. 17, pp. 5151-5156, 2004.

[04-87] I. W. Lenggoro, Y. Itoh, K. Okuyama, and T. O. Kim, "Nanoparticles of a Doped Oxide Phosphor Prepared by Direct Spray Pyrolysis," J. Mater. Res., Vol. 19, No. 12, pp. 3534-3539, 2004.

[04-88] T. Myojo, K. Ehara, H. Koyama, and K. Okuyama, "Size Measurement of Polystyrene Latex Particles Larger than One Micrometer Using a Long Differential Mobility Analyzer," Aerosol Sci. Technol., Vol. 38, No. 12, pp. 1178-1184, 2004.

[04-89] T. Moriya, H. Nagaike, K. Denpoh, T. Morimoto, M. Aomori, S. Kawaguchi, M. Shimada, and K. Okuyama, "Observation and Evaluation of Flaked Particles Behaviors in Magnetically Enhanced Reactive Ion Etching Equipment Using Dipole Ring Magnet," J. Vac. Sci. Technol. B. Vol. 22, No. 4, pp. 1688-1693, 2004.

1.8 Atomic scale processes

[04-90] Anri Nakajima and Shin Yokoyama, "Atomic-layer-deposition of ultrathin silicon nitride for sub-tunneling gate dielectrics," ECS Symposium I1: Proceedings of the First International Symposium on Dielectrics for Nanosystems (Honolulu, Hawaii, October 3-8), Vol. 2004-04, pp. 418-424, 2004 (Invited).

1.9 Low temperature processes

[04-91] H. Kaku, S. Higashi, H. Taniguchi, H. Murakami and S. Miyazaki, "A new crystallization technique of Si films on glass substrate using thermal plasma jet," Appl. Surf. Sci., Vol. 244, No. 1-4, pp. 8-11, 2004.

[04-92] S. Higashi, H. Kaku, H. Taniguchi, H. Murakami and S. Miyazaki, "Crystallization of Si Fil-　ms on Glass Substrate Using Thermal Plasma Jet," Thin Solid Films., Vol. 487, pp. 122-125, 2005.

[04-93] S. Higashi, H. Kaku, H. Murakami, S. Miyazaki, M. Asami, H. Watakabe, N. Ando and T. Sameshima , "Crystallization of Si Thin Film Using Thermal Plasma Jet and Its Application to Thin-Film Transistor Fabrication," Proc. Int. Workshop on Active-Matrix Liquid-Crystal Displays 2004, (Tokyo Japan, August 25-27, 2004), pp. 179-180, 2004.

[04-94] H. Kaku, S. Higashi, H. Taniguchi, H. Murakami and S. Miyazaki , "A new crystallization technique of Si flms on glass substrate using thermal plasma jet," Abst. of 12th Int. conf. on Solid Films and Surfaces (Hamamatsu, June 21-25, 2004 ), p. 7 [A1-4], 2004.

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2 Self-assembling techniques and quantum structures

2.1 Silicon quantum dots and quantum electronics

[04-95] Tetsuya Kitade, Kensaku Ohkura, and Anri Nakajima, "Room temperature operation of an exclusive-OR circuit using a highly doped Si single-electron transistor," Appl. Phys. Lett. Vol. 86, No.12, 123118 (3 pages) March 2005.

[04-96] Tetsuya Kitade, Kensaku Ohkura, and Anri Nakajima, "Room Temperature Operation of an Exclusive-OR Circuit Using a Highly doped Si Single-Electron Transistors," Ext. Abst. Int. Conf. on Solid State Devices and Materials (SSDM2004), pp. 890-891, 2004.

[04-97] K. Makihara, H. Deki, H. Murakami, S. Higashi, and S. Miyazaki , "Control of the Nucleattion Density of Si Quantum Dots by Remote Hydrogen Plasma Treatment ," Abst. of 12th Int. conf. on Solid Films and Surfaces (Hamamatsu, June 21-25, 2004 ) , p. 137 [A5-2], 2004.

[04-98] K. Makihara, Y. Okamoto, H. Murakami, S. Higashi, and S. Miyazaki , "Characterization of Germanium Nanocrystallites Grown on SiO2 by a Conductive AFM Probe Technique," Ext. Abst. of 2004 Asia-Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (Nagasaki, June 30-July 2, 2004), pp. 277-280 [A10.5], 2004.

[04-99] T. Shibaguchi, M. Ikeda, H. Murakami, and S. Miyazaki , "Charging and Discharging Characteristics of Stacked Floating Gates of Silicon Quantum Dots," Ext. Abst. of 2004 Asia- Pacific Workshop on Fundamentals and Application of Advanced Semiconductor Devices (Nagasaki, June 30-July 2, 2004), pp. 273-276 [A10.4], 2004.

[04-100] T. Nagai, M. Ikeda, H. Murakami, S. Higashi, and S. Miyazaki, "Photo-Induced Electron Charging to Silicon-Quantum-Dot Floating Gate in Metal-Oxide-Semiconductor Memories ," Ext. Abst. of 2004 Int. Conf. on Solid State Devices and Materials (Tokyo, September 15-17, 2004), pp. 126-127 [H-2-4], 2004.

[04-101] Y. Darma, Hideki Murakami, and S. Miyazaki , "Influence of Thermal Annealing on Compositional Mixing and Crystallinity of Highly-Selective Grown Si Dots with Ge Core," Appl. Surf. Sci., Vol. 224, pp. 156-159, 2004.

[04-102] S. Miyazaki, T. Shibaguchi, and M. Ikeda , "Characterization of Charged States of Si Quantum Dots Floating Gate in MOS Structures," Abst. of Electrochemical Society-Int. Symp. on Nanoscale Devices and Materials (Hawaii, Oct. 3-8, 2004) , [No. 1013], 2004.

[04-103] S. Miyazaki, "Characterization of Charged States of Silicon-based Quantum Dots and Its Application to Floating Gate MOS Memories," Abst. of Int. Union of Materials Research Societies-Int. conf. in Asia-(Hsinchu, Taiwan, Nov. 16-18, 2004), pp. 208 [F-I-08], 2004 (Invited).

[04-104] S. Miyazaki, "Electrical Charging Characteristics of Silicon Dots Floating Gates in MOS Devices," Proc. of 7th China-Japan Symp. on Thin Films (Chengdu Sichuan, China, September 20-22,2004), pp. 7-10 [3], 2004, (Invited).

[04-105] S. Miyazaki, "Charging/Discharging Characteristics of Silicon Quantum Dots and Their Application to Memory Devices," Abst. of The 2004 Joint conf. of The 7th Int. conf. on Advanced Surface Enginnering (ASE2004) and The 2nd Int. Conf. on Surface and Interface Science and Engineering (SISE2004) FSISE 2004(Guangzhou , China, May 14-26, 2004), pp.138[No. 270], 2004, (Invited).

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3 Technologies for intelligent systems

[04-106] T. Inoue, T. Hironaka, T. Sasaki, S. Fukae, T. Koide, H.J. Mattausch, "Proposition and Evaluation of a Bank-Based Multi-Port Memory with Blocking Network," Proceedings of the 2004 International Technical Conference on Circuits/Systems, Computers and Computers and Communications (ITC-CSCC2004), 6C2L-3, 2004.

[04-107] O. Kiriyama, T. Morimoto, H. Adachi, Y. Harada, T. Koide, and H.J. Mattausch, "Low-Power Design for Real-Time Image Segmentation LSI and Compact Digital CMO Implementation," Proceedings of the 2004 IEEE Asia-Pacific Conference on ASICs (AP-ASIC2004), pp. 432-433, 2004.

[04-108] Z. Zhu, K. Johguchi, H.J. Mattausch, T. Koide, and T. Hironaka, "Low Power Bank-based Multi-port SRAM Design due to Bank Standby Mode," Proceedings of the 47th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS2004), Vol. I, pp. 569-572, 2004.

[04-109] Y. Shirakawa, H.J. Mattausch, and T. Koide, "Reference-Pattern Learning and Optimization from an Input-Pattern Stream for Associative-Memory-Based Pattern-Recognition System," Proceedings of the 47th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS2004), Vol. I, pp. 561-564, 2004.

[04-110] K. Kamimura, K. M. Rahman, H.J. Mattausch, and T. Koide, "Optimized Multi-Stage Minimum-Distance-Search Circuit with Feedback Stabilization for Fully-Parallel Associative Memories," Proceedings of the 47th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS2004), Vol. I, pp. 161-164, 2004.

[04-111] K. Takemura, T. Koide, H.J. Mattausch, and T. Tsuji, "Analog-Circuit-Component Optimization with Genetic Algorithm," Proceedings of the 47th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS2004), Vol. I, pp. 489-492, 2004.

[04-112] T. Morimoto, O. Kiriyama, H. Adachi, T. Koide, and H.J. Mattausch, "Digital Low-Power Real-Time Video Segmentation by Region Growing," Ext. Abst. Int. Conf. on Solid State Devices and Materials (SSDM2004), pp. 138-139, 2004.

[04-113] Y. Shirakawa, M. Mizokami, T. Koide, and H.J. Mattausch, "Automatic Pattern-Learning Architecture Based on Associative Memory and Short/Long Term StorageConcept," Ext. Abst. Int. Conf. on Solid State Devices and Materials (SSDM2004), pp. 362-363, 2004.

[04-114] T. Koide, Y. Yano, and H.J. Mattausch, "Bank-Type Associative Memory for High-Speed Nearest Manhattan Distance Search in Large Reference-Pattern Space," Ext. Abst. Int. Conf. on Solid State Devices and Materials (SSDM2004), pp. 360-361, 2004.

[04-115] T. Fuji, K. Kobayashi, T. Koide, H.J. Mattausch, and T. Hironaka, "Highly Efficient Switch Architecture Based on Banked Memory with Multiple Ports," 12th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI2004), pp. 491-498 2004.

[04-116] H. Adachi, T. Morimoto, O. Kiriyama, T. Koide, and H.J. Mattausch, "Real-Time Segmentation of Large-Scale Images by Pipeline Processing with Small-Size Cell Network," 12th Workshop on Synthesis And System Integration of Mixed Information Technologies (SASIMI2004), pp. 95-102, 2004.

[04-117] A. Ahmadi, H.J. Mattausch, and T. Koide, "A Numerical Approach for Snake Models and Implementation with an FPGA Architecture," Proceedings of the Annual Workshop on Circuits, Systems and Signal Processing (ProRISC’2004), pp. 1-6, 2004.

[04-118] T. Morimoto, O. Kiriyama, H. Adachi, Z. Zhu, T. Koide, and H.J. Mattausch, "A Low-Power Video Segmentation LSI with Boundary-Active-Only Architecture," Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC‘2005.1), D13-D14, 2005.

[04-119] T. Sasaki, T. Inoue, N, Omori, T. Hironaka, H.J. Mattausch, and T. Koide, "Chip Size and Performance Evaluations of Shared Cache for On-chip Multiprocessors," Systems & Computers in Japan No.36(9), pp. 1-13, 2005.

[04-120] H. Noda, K. Inoue, M. Kuroiwa, F. Igaue, K. Yamamoto, H.J. Mattausch, T. Koide, A.Amo, A. Hachisuka, S. Soeda, F. Morishita, K. Dosaka, K. Arimoto, and T. Yoshihara, "A Cost- Efficient High-Performance Dynamic TCAM with Pipelined Hierarchical Searching and Shift Redundancy Architecture," IEEE Journal of Solid-State Circuits, Vol 40, pp. 245-253, 2005.

[04-121] T. Inoue, T. Hironaka, T. Sasaki, S. Fukae, T. Koide, and H. J. Mattausch, "Evaliation of a bank based multi-port memory architecture with blocking network," IEICE Trans. on Fundamentals of Electrics, Communications and Computer Science, Vol. J88-A, No. 4, pp. 498-510, 2005, (in Japansese).

[04-122] T. Yoshida, M. Akagi, T. Mashimo, A. Iwata, M. Yoshida, and K. Uematsu, "Design of Wireless Neural-Sensing LSI," IEICE Trans. Electronics, Vol. E87-C, pp. 996-1002. June, 2004.

[04-123] T. Yoshimura and A. Iwata,"An analysis of interference in synchronous systems," IEICE Electronics,Express, vol.1, No.15, pp.465-471, 2004. M. Shiozaki, T. Mukai, M. Ono, M. Sasaki and A. 3．Iwata, " A 2Gbps and 7-multiplexing CDMA Serial Receiver Chip for Highly Flexible Robot Control System " 2004 Symposium on VLSI Circuits, Digest of Technical Papers, pp.194-197, Honolulu, Hawaii, June 17-19, 2004.

[04-124] M. Shiozaki, T. Mukai, M. Ono, M. Sasaki, and A. Iwata, "A 2Gbps and 7-multiplexing CDMA Serial Receiver Chip for Highly Flexible Robot Control System," 2004 Symposium on VLSI Circuits, Digest of Technical Papers, pp. 194-197, Honolulu, Hawaii, June 17-19, 2004.

[04-125] T. Morie, J. Umezawa, and A. Iwata, "A Pixel-Parallel Image Processor for Gabor Filtering Based on Merged Analog-Digital Architecture," 2004 Symposium on VLSI Circuits, Digest of Technical papers., pp. 212-213, #14-1, Honolulu, Hawaii, June 18, 2004.

[04-126] T. Morie, T. Nakano, J. Umezawa, and A. Iwata, "Gabor Filtering Using Cellular Neural Networks and its Application to Face/Object Recognition," World Automation Congress, #IFMIP075, Seville, Spain, June 28 - July 1, 2004.

[04-127] K. Sasaki, T. Morie, and A. Iwata, "A Spiking Neural Network with Negative Thresholding and Its Application to Associative Memory," 2004 IEEE Int. Midwest Symposium on Circuits and Systems (MWSCAS2004), pp. III-89 - III-92, Hiroshima, July 25-28, 2004.

[04-128] O. Nomura, T. Morie, K. Korekado, M. Matsugu, and A. Iwata, "A Convolutional Neural Network VLSI Architecture Using Thresholding and Weight Decomposition," Int. Conf. on Knowledge-Based Intelligent Information and Engineering Systems (KES'2004), Wellington, New Zealand, Sept. 22-24, 2004.

[04-129] T. Yoshida, T. Mashimo, M. Akagi, A. Iwata, M. Yoshida, and K. Uematsu, "A Low Noise Amplifier using Chopper Stabilization for a Neural Sensor LSI," Ext. Abst. Int. Conf. on Solid State Devices and Materials (SSDM2004), pp. 539-541, 2004.

[04-130] A. Iwata, M. Sasaki, T. Kikkawa, S. Kameda, H.Ando, K.Kimoto, D.Arizono, and H.Sunami, "A 3D-Integration Scheme Utilizing Wireless Interconnections for Implementing Hyper Brains," IEEE 2005 International Solid-State Circuits Conference Digest of Technical Papers., TP14.4, pp. 262-263, San Francisco, Feb. 6-10, 2005.

[04-131] M. Nagata, M. Fukazawa, N. Hamanishi, M. Shiochi, T. Iida, J. Watanabe, Y. Murasaka, and A. Iwata," Substrate Integrity Beyond 1GHz,"IEEE 2005 International Solid-State Circuits Conference Digest of Technical Papers, TP14.6, pp. 266-267, San Francisco, Feb. 6-10, 2005.

[04-132] 岩田穆,亀田成司, "生命体情報処理とエレクトロニクスの融合," 応用物理，Vol. 74, No. 7. pp. 884-889, 2005.

[04-133] M. Nakano, K. Tanaka, A. Higashi, R. Masuyama, Y. Kadoya, and M. Yamanishi "Generation of Extremely Weak Sub-Poissonian Light Using High-Efficiency Light-Emitting Diodes," Jpn. J. Appl. Phys., Vol. 43, No. 8B , L1114-L1117, 2004.