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2005 (2005 April - 2006 March)

  1. Advanced device process and material technologies for ULSI
  2. Self assembling techniques and quantum structures
  3. Technologies for intelligent systems

1. Advanced device, process, and material technologies for ULSI

  • Fabrication techniques for scaled MOS devices
  • Evaluation and modeling techniques for scaled MOS devices
  • High-k dielectrics
  • Interconnect technologies
  • Low-k dielectrics
  • Wireless interconnects
  • CVD and contamination/particle control
  • Atomic scale processes

    • 1.1. Fabrication techniques for scaled MOS devices

    1. T. Hosoi, M. Hino, K. Sano, N. Ooishi, and K. Shibahara, “Molybdenum-Gate MOSFET Threshold Voltage Modification Based on Two-Dimensional Nitrogen Distribution Control in Gate Electrode,” Ext. Abs. of MRS 2005 spring meeting, G14.5 pp.191-192.
    2. K. Shibahara, K. Kurobe, T. Eto, and Y. Ishikawa, “Diffusion-Less Junction Formation by Heat-Assisted Laser Annealing,” Ext. Abs. of Int. Meeting for Future Electron Devices, Kansai (2005 IMFEDK, Kyoto, Apr. 11-13, 2005), pp. 135-136.
    3. T. Eto, and K. Shibahara, “Accuracy of SIMS Depth Profiling for Sub-keV As+ Implantation,” Jpn. J. Appl. Phys. Part 1. Vol. 44, No. 4B, pp. 2433-2436, 2005.
    4. E. Takii, T. Eto, K. Kurobe, and K. Shibahara, “Ultra Shallow Junction Formation by Green-Laser Annealing with Light Absorber,” Jpn. J. Appl. Phys. Part 2. Lett., Vol. 44, No. 24, pp. L756-L759, 2005.
    5. K. Shibahara, ”Benefits of Heat-assist for Laser Annealing, “Ext. Abst. of Int. Workshop on Junction Technology, (IWJT, Osaka, Jun. 6-7, 2005), pp. 53-54, Invited.
    6. K . Hosawa, K. Matsumoto, and K. Shibahara, “Anomalous Doping Profile in Heavily Doped Ge,” Ext. Abst. of Int. Workshop on Junction Technology, (IWJT, Osaka, Jun. 6-7, 2005), pp. 39-40.
    7. K. Sano, M. Hino, N. Ooishi, and K. Shibahara, “Workfunction Tuning Using Various Impurities for Fully Silicided NiSi,” Jpn. J. Appl. Phys. Part 1. Vol. 44, No. 6A, pp. 3774-3777, 2005.
    8. 松野 明,　楡 孝,　芝原 健太郎, “超LSI対応レーザー不純物活性化技術,” レーザー研究, 第33巻, 7号, 2005年7月, pp. 457- 461.
    9. A. Matsuno, E. Takii, T. Eto, K. Kurobe, and K. Shibahara, “Merits and Demerits of Light Absorbers for Ultra Shallow Junction Formation by Green Laser Annealing,” Nucl. Instr. and Meth. B, Vol. 237 (2005) pp. 136-141.
    10. A. Matsuno, and K. Shibahara, “Function of Phase Switch Layer for Ultra Shallow Junction Formation by Green Laser Annealing,”, Ext. Abst. Int. Conf. on Solid State Devices and Materials (SSDM 2005, Kobe, Sep. 13-15, 2005), pp. 914-915.
    11. K. Shibahara, A. Matsuno, E. Takii, and T. Eto, “Green Laser Annealing with Light Absorber,” 13th IEEE Int. Conf. on Advanced Thermal Processing of Semiconductors - RTP 2005 (Santa Barbara, Oct. 4-7, 2005), pp. 101-104.
    12. K. Sano, T. Hosoi, and K. Shibahara, “Importance of Heat-up Ramp Rate for Palladium-silicide Fully-silicided-gate Structure Formation,” 13th IEEE Int. Conf. on Advanced Thermal Processing of Semiconductors - RTP 2005 (Santa Barbara, Oct. 4-7, 2005), pp. 145-148.
    13. K. Kurobe, Y. Ishikawa and K. Shibahara, “Sheet Resistance Reduction and Crystallinity Improvement in Ultrashallow n+/p Junctions by Heat-Assisted Excimer Laser Annealing,” Jpn. J. Appl. Phys., Vol. 44 (2005), No. 12, pp. 8391-8395.
    14. T. Hosoi, K. Sano, M. Hino, A. Ohta, K. Makihara, H. Kaku, S. Miyazaki, and K. Shibahara, ”Characterization of Sb-Doped Fully-Silicided NiSi/SiO2/Si MOS Structure, “2005 Int. Semiconductor Device Res. Symp. Proceedings (ISDRS 2005, Bethesda, Maryland, USA, Dec. 7-9, 2005), pp. WP-4-05-1-WP-4-05-2.
    15. K. Kobayashi, T. Eto, K. Okuyama, K. Shibahara, and H. Sunami, “Application of Arsenic Plasma Doping in Three-Dimensional MOS Transistors and the Doping Profile Evaluation,” Jpn. J. Appl. Phys., Vol. 44, No. 4B, pp. 2273-2278, April 2005.
    16. H. Sunami and K. Okuyama, “High-Aspect-Ratio Structure Formation Techniques for Three-Dimensional Metal-Oxide-Semiconductor Transistors,” Ext. Abst. of 31st International Conference on Micro- and Nano-Engineering, No. 11B_03, Sept. 19-22, Vienna, Austria, 2005.
    17. H. Sunami, S. Matsumura, K. Yoshikawa, and K. Okuyama, “High-aspect-ratio structure formation techniques for three-dimensional metal-oxide-semiconductor transistors,” Microelectronic Engineering, Vol. 83, pp. 1740-1744, March 2006
    18. S. Miyazaki, and N. Kosku, “The Application of very High Frequency Inductively-coupled Plasma to High-Rate Growth of Microcrystalline Silicon Films,” 21st Int. Conf. on Amorphous and Nanocrystalline Semiconductors(September 4-9, 2005, Lisbon, Portugal), [TP1.1].
    19. S. Zhu, and A. Nakajima, “Annealing Temperature Dependence on Nickel-Germanium Solid-State Reaction,” Jpn. J. Appl. Phys., Vol. 44, No. 24 pp. L753?L755, June 2005.
    20. S. Zhu, A. Nakajima, Yuichi Yokoyama, and Kensaku Ohkura, “Temperature Dependence of Ni-Germanide Formed by Ni-Ge Solid-State Reaction,” Ext. Abst. 5th International Workshop on Junction Technology 2005 (IWJT2005),(Osaka, June 7-8, 2005), pp. 85-86.
    21. M. Ooka, and S. Yokoyama, “Contact-Hole Etching with NH3-Added C5F8 Pulse-Modulated Plasma,” Jpn. J. Appl. Phys.,Vol. 44, No. 9A, pp.6476-640, 2005.

    1.2. Evaluation and modeling techniques for scaled MOS devices

    1. K. Konno, O. Matsushima, K. Hara, G. Suzuki, D. Navarro and M. Miura-Mattausch, “Carrier transport model for lateral p-i-n photodiode in high-frequency operation,” Jpn. J. Appl. Phys., Vol. 44, No. 4B, pp. 2584-2585, 2005.
    2. D. Navarro, T. Mizoguchi, M. Suetake, K. Hisamitsu, H. Ueno, M. Miura-Mattausch, H. J. Mattausch,S. Kumashiro, T. Yamaguchi, K. Yamashita, and N. Nakayama, “A compact model of the pinch-off region of 100 nm MOSFETs based on the surface-potential,” IEICE Transactions on Electronics Vol. E88-C, No.5, pp. 1079-1086, 2005.?
    3. G. Suzuki, K. Konno, D. Navarro, N. Sadachika, Y. Mizukane, O. Matsushima and M. Miura-Mattausch, “Time-domain-based modeling of carrier transport in lateral p-i-n photodiode,” SISPAD 2005, 2005.
    4. Y. Takeda, D. Navarro, S. Chiba, M. Miura-Mattausch, H. J. Mattausch, T. Ohguro, T. Iizuka, M. Taguchi, S. Kumashiro, and S. Miyamoto, “MOSFET harmonic distortion analysis up to the non-quasi-static frequency regime,” IEEE 2005 Custom Integrated circuits Conference, pp.827-830, 2005.
    5. S. Zhu, A. Nakajima, T. Ohashi, and H. Miyake, “Enhancement of BTI Degradation in pMOSFETs under High-Frequency Bipolar Gate Bias, ”IEEE Electron Device Lett. Vol. 26, No. 6, pp. 387-389, June 2005.
    6. A. Nakajima, H. Ishii, and S. Yokoyama, “Carrier Mobility in Metal-Oxide-Semiconductor Field Effect Transistor with Atomic-Layer-Deposited Si-Nitride Gate Dielectrics,” Jpn. J. Appl. Phys., Vol. 44, No. 28, pp. L903?L905, July 2005.
    7. A. Nakajima, T. Ohashi, S. Zhu, S. Yokoyama, S. Michimata, and H. Miyake, “Atomic-Layer-Deposited Si-Nitride/SiO2 Stack Gate Dielectrics for Future High-Speed DRAM with Enhanced Reliability,” IEEE Electron Device Lett. Vol. 26, No. 8, pp. 538-540, August 2005.
    8. S. Zhu, A. Nakajima, T. Ohashi, and H. Miyake, “Pulse Waveform Dependence on AC Bias Temperature Instability in pMOSFETs,” IEEE Electron Device Lett. Vol. 26, No. 9, pp. 658-660, Sept. 2005.
    9. S. Zhu, A. Nakajima, T. Ohashi, and H. Miyake, “Interface trap and oxide charge generation under negative bias temperature instability of p-channel metal-oxide-semiconductor field-effect transistors with ultrathin plasma-nitrided SiON gate dielectric,” J. Appl. Phys., Vol. 98, No. 11, Art. No. 114504 (6 pages), Dec. 2005.
    10. S. Zhu, A. Nakajima, T. Ohashi, and H. Miyake, “Influence of bulk bias on negative bias temperature instability of p-channel metal?oxide-semiconductor field-effect transistors with ultrathin SiON gate dielectrics,” J. Appl. Phys., Vol. 99, No. 6, Art. No. 064510 (6 pages), March 2006.
    11. S. Zhu, A. Nakajima, T. Ohashi, and H. Miyake, “Influence of bulk bias on NBTI of pMOSFETs with ultrathin SiON gate dielectric,” Ext. Abst. 2005 Int. Conf. on Solid State Devices and Materials (SSDM2005),(Kobe, Sept. 13-15, 2005), pp. 872-873.

    1.3. High-k dielectrics

    1. H. Nakagawa, F. Takeno, A. Ohta, H. Murakami, S. Higashi, and S. Miyazaki, “Characterization of Chemical Bonding Features of NH3-Annealed Hafnium Oxides Formed on Si(100),” 8th Atomically Controlled Surfaces, Interfaces and Nanostructures (ACSIN-8), (Stockholm, June 19-23, 2005), pp. 102 .
    2. A. Ohta, H. Murakami, S. Higashi, and S. Miyazaki, “ Photoemission Study of Ultrathin GeO2/Ge Heterostructures Formed by UV-O3 Oxidation,” Abst. of The 4th Int. Symp. Surface Science and Nanotechnology (Omiya, Saitama, November 14 - 17, 2005), pp. 543, [Th-A9].
    3. Y. Pei, S. Nagamachi, H. Murakami, S. Higashi, and S. Miyazaki, “ Characterization of Charge Trapping and Dielectric Breakdown of HfAlOx/SiON Dielectric Gate Stack ,” The Electrochemical Society, 208th Meeting (Los Angeles, U.S.A, Oct. 16-21, 2005), [J1-739].
    4. H. Murakami, W. Mizubayashi, H. Yokoi, A. Suyama, and S. Miyazaki, “Electrical Characterization of Aluminum-Oxynitride Stacked Gate Dielectrics Prepared by a Layer-by-Layer Process of Chemical Vapor Deposition and Rapid Thermal Nitridation,” IEICE Trans. on Electronics, Vol. E88-C, No. 4, pp. 640-645, 2005.
    5. H. Murakami, Y. Moriwaki, M. Fujitake, D. Azuma, S. Higashi, and S. Miyazaki, “Characterization of Atom Diffusion in Polycrystalline Si/SiGe/Si Stacked Gate,” IEICE Trans. on Electronics, Vol. E88-C, No. 4, pp. 646-650, 2005.
    6. S. Nagamachi, A. Ohta, F. Takeno, H. Nakagawa, H. Murakami, S. Miyazaki, T. Kawahara and K. Torii, “Analysis of Leakage Current through Al/HfAlOx/SiONx/Si(100) MOS Capacitors,” Trans. of the Mat. Res. Soc. of Japan , Vol. 30, No. 1, pp. 197-200, 2005.
    7. F. Takeno, A. Ohta, S. Miyazaki, K. Komeda, M. Horikawa and K. Koyama, “Impact of Rapid Thermal Anneal on ALCVD-Al2O3/Si3N4/Si(100) Stack Structures-Photoelectron Spectroscopy,” Trans. of the Mat. Res. Soc. of Japan , Vol. 30, No. 1, pp. 213-217, 2005.
    8. Y. Pei, S. Nagamachi, H. Murakami, S. Higashi, S. Miyazaki, T. Kawahara, K. Torii and Y. Nara, “Characterization of Charge Trapping and Dielectric Breakdown of HfAlOX/SiON Dielectric Gate Stack,” in Physics and Chemistry of SiO2 and the Si-SiO2 Interface-5 ECS Trans., Vol. 1, No. 1 (2005) pp. 163-172.
    9. Y. Pei, S. Nagamachi, H. Murakami, S. Higashi, S. Miyazaki, T. Kawahara and K. Torii, “Electrical Characterization of HfAlOx/SiON Dielectric Gate Capacitors,” Trans. of the Mat. Res. Soc. of Japan , Vol. 30, No. 1, pp. 205-208, 2005.

    1.4. Interconnect technologies

    1. Y. Tanushi, and S. Yokoyama, “Design and Simulation of Ring Resonator Switches using Electro-Optic Materials,” Abst. Int. Conf. on Solid State Devices and Materials (SSDM2005), pp. 318-319, 2005.
    2. M. Suzuki, Zhimou Xu, Y. Tanushi, and S. Yokoyama, “Structural and Optical Properties of Electro-Optic Material: Sputtered (Ba,Sr)TiO3,” Abst. Int. Conf. on Solid State Devices and Materials (SSDM2005), pp. 732-733, 2005.
    3. T. Tabei, K. Maeda, S. Yokoyama, and H. Sunami, “Fabrication of spin-coat optical waveguides for optically interconnected LSI and influence of fabrication process on lower layer MOS capacitors,” Ext. Abst. of International Symp. on Solid State Devices and Materials, Abs. No. E-4-4, pp. 332-333, Tokyo, Sept. 13-15, 2005.
    4. Z. Xu, M. Suzuki, Y. Tanushi, K. Wakushima, and S. Yokoyama, “Groove-Buried Optical Waveguides Based on Metal Organic Solution-Derived Ba0.7Sr0.3TiO3 Thin Films,” Abst. Int. Conf. on Solid State Devices and Materials (SSDM2005), pp. 738-739, 2005.
    5. T. Tabei, K. Maeda, S. Yokoyama, and H. Sunami, “Fabrication of spin-coat optical waveguides for optically interconnected LSI and influence of fabrication process on lower layer MOS capacitors,” Abst. Int. Conf. on Solid State Devices and Materials (SSDM2005), pp. 332-333, 2005.
    6. S. Yokoyama, and T. Kakite, “Novel Fabrication Technique of Optical Waveguides using Low Density Silicon Nitride Films Deposited by Plasma-Enhanced Chemical Vapor Deposition,” Abst. Int. Conf. on Solid State Devices and Materials (SSDM2005), pp. 736-737, 2005.
    7. Y. Tanushi, and S. Yokoyama, “High-Speed and Low-Voltage Ring Resonator Optical Switches Using Electro- and Magneto-Optic Materials,” Proc. IEEE LEOS 2nd Int. Conf. on Group IV Photonics, pp. 165 -167, 2005.
    8. Z. Xu, M. Suzuki, and S. Yokoyama, “Structure and Optical Band-Gap Energies of Ba0.5Sr0.5TiO3 Thin Films Fabricated by RF Magnetron Plasma Sputtering,” Jpn. J. Appl. Phys., Vol. 44, No. 12A, 2005.

    1.5. Low-k dielectrics

    1. H. Miyoshi, K. Yamada, K. Kohmura, N. Fujii, H. Matsuo, H. Tanaka, Y. Oku, Y. Seino, N. Hata, and T. Kikkawa, “Theoretical investigation of dielectric constant and elastic modulus of three-dimensional isotropic porous silica films with cubic and disordered pore arrangements,” JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS BRIEF COMMUNICATIONS & REVIEW PAPERS 44 (8), pp. 5982-5986 , AUG. 2005.
    2. A. Ishikawa, H. Matsuo, and T. Kikkawa, “Influence of slurry chemistry on frictional force in copper chemical mechanical polishing,” JOURNAL OF THE ELECTROCHEMICAL SOCIETY 152 (9), G695-G697, 2005.
    3. T. Kikkawa, S Kuroki, S. Sakamoto, K. Kohmura, H. Tanaka, and N. Hata, “Influence of humidity on electrical characteristics of self-assembled porous silica low-k films,” JOURNAL OF THE ELECTROCHEMICAL SOCIETY 152 (7), G560-G566, 2005.
    4. S. Kuroki, and T. Kikkawa, “Characterization of photosensitive low-k films using electron-beam lithography,” JOURNAL OF THE ELECTROCHEMICAL SOCIETY 152 (4), G281-G285, 2005
    5. H. Miyoshi, H. Matsuo, H. Tanaka, K. Yamada, Y. Oku, S. Takada, N. Hata, and T. Kikkawa, “Theoretical investigation of dielectric constant and elastic modulus of two-dimensional periodic porous silica films with elliptical cylindrical pores,” JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS 44 (3), pp. 1161-1165, MAR. 2005.
    6. H. Miyoshi, N. Hata, and T. Kikkawa, “Theoretical investigation into effects of pore size and pore position distributions on dielectric constant and elastic modulus of two-dimensional periodic porous silica films,” JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS 44 (3), pp. 1166-1168, MAR. 2005.
    7. M. Tada, H. Ohtaka, M. Narihiro, F. Ito, T. Taiji, M. Tohara, K. Motoyama, Y. Kasama, M. Tagami, M. Abe, T. Takeuchi, K. Arai, S. Saito, N. Furutaka, T. Onodea, J. Kawahara, K. Kinoshita, N. Hata, T. Kikkawa, Y. Tsuchiya, K. Fujiii, N. Oda, M. Sekine, and Y. Hayashi, “Feasibility study of a Nobel Molecular-Pore-Stacking (MPS), SiOCH Film in Fully-scale-down, 45nm-node Cu Damascene Interconnects,” Ext. Abst. of the 2005 Symposium on VLST Circuits, Kyoto, June 14-16, 2005.
    8. R. Yagi, S. Chikaki, M. Shimoyama, T. Yoshino, T. Ono, A. Ishikawa, N. Fujiii, N. Hata, T. Nakamura, K. Kohmura, H. Tanaka, T. Goto, J. Kawahara, Y. Sonoda, H. Matsuo, Y. Seino, K. Kinoshita, and T. Kikkawa, “Control of Process-Induced Damages in Self-Assembled Porous Silica/Cu Damascene Interconnects for 45nm Node and Beyond,” Ext. Abst. of the 2005 Symposium on VLST Circuits, Kyoto, June 14-16, 2005.
    9. X. Li, N. Fujii, N. Hata, and T. Kikkawa, “Adsorption in-situ Spectroscopic Ellipsometry Analysis of Disordered Porous Silica Low-k Films,” Ext. abst. of the 2005 International Conference on Solid State Devices and Materials, pp. 294-295, Kobe, September 13-15, 2005.
    10. S. Takada, N. Hata, S. Hishiya, N. Fujii, T. Nakayama, and T. Kikkawa, “Infrared Complex Dielectric Function Analysis for Chemical Bonding Structure of Porous Silica Low Dielectric Constant Films,” Ext. abst. of the 2005 International Conference on Solid State Devices and Materials, pp. 552-553, Kobe, September 13-15, 2005.
    11. T. Yoshino, G. Guan, N. Hata, N. Fujii, and T. kikkawa, “Electrical Characteristics of Porous Zeolite Interlayer Dielectrics,” Ext. abst. of the 2005 International Conference on Solid State Devices and Materials, pp. 58-59, Kobe, September 13-15, 2005.
    12. Y. Shishida, S. Chikaki, M. Shimoyama, R. Yagi, T. Yoshino, T. Ono, A. Ishikawa, N. Fujii, T. Nakayama, K. Kohmura, Y Sonda, H. Matsuo, S. Hishiya, T. Yamanishi, and T. Kikkawa, “Comparative Studies of Pore Seal Films for Porous-Silica/Cu Interconnect,” Ext. abst. of the 2005 International Conference on Solid State Devices and Materials, pp. 302-303, Kobe, September 13-15, 2005.
    13. T. Takimura, N. Hata, T. Nakayama, Y. Shishida, R. Yagi, J. Kawahara, S. Chikaki, N. Fuji, and T. Kikkawa, “Mechanical Strength of Multilayered Dielectric Structures Measures by Laser-Pulse Generated Surface-Acoustic-Wava Techinique,” Ext. abst. of the 2005 International Conference on Solid State Devices and Materials, pp. 52-53, Kobe, September 13-15, 2005.
    14. T. Ono, K. Kinoshita, K. Kurihara, Y. Takasu, Y. Seino, N. Hata, and T. Kikkawa, “Effect of Dry Etching Chemistry on Reduction of Surface Roughness of Porous Silica Low-k Film,” Proceedings of international symposium on dry process (The Institute of Electrical Engineers of Japan), pp. 41-42, 2005.
    15. S. Chikaki, M. Shimoyama, R. Yagi, T. Yoshino, Y. Shishida, T. Ono, A. Ishikawa, N. Fujii, T. Nakayama, K. Kohmura, H. Tanaka, J. Kawahara, H. Matsuo, S. Takada, T. Yamanishi, S. Hishiya, N. Hata, K. Kinoshita, and T. Kikkawa, “Extraction of process-induced damage in low-k/Cu damascene structure,” International Symposium on Semiconductor Manufactureing 2005 (ISSM), pp. 422-425, 2005.
    16. A. Ishikawa, H. Matsuo, and T. Kikkawa, “Influence of Slurry Chemistry on Frictional Force in Copper Chemical Mechanical Polishing,” Journal of the Electrochemical Society (The Electrochemical Society), Vol.152, Iss.9, G695-G697, 2005.
    17. N. Kunimi, J. Kawahara, K. Kinoshita, A. Nakano, M. Komatsu, and T. Kikkawa, “A Novel Organic Low-k Film Deposited by Plasma-Enhanced Co-Polymerization,” Materials Research Society Symposium 2005 Spring Proceedings (Materials Research Society), Vol. 863, pp. 103-108, 2005.
    18. H. Miyoshi, K. Yamada, K. Kohmura, N. Fujii, H. Matsuo, H. Tanaka, Y. Oku, Y. Seino, N. Hata, and T. Kikkawa, “Theoretical Investigation of Dielectric Constant and Elastic Modulus of Three-Dimensional Isotropic Porous Silica Films with Cubic and Disordered Pore Arrangements,” Japanese Journal of Applied Physics (Institute of Pure and Applied Physics), Vol. 44, No. 8, pp. 5982-5986, 2005.
    19. K. Kinoshita, K. Nakamura, J. Kawahara, O. Kiso, N. Toyoda, H. Sugai, and T. Kikkawa, “Distributions of electron density and deposition rate of a narrow-gap plasma polymerization system,” Proceedings of ICPIG-2005 (University Congress Office, Eindhoven University of Technology), pp. 200, 2005.
    20. M. Tada, H. Ohtake, M. Narihiro, F. Ito, T. Taiji, M. Tohara, K. Motoyama, Y. Kasama, M. Tagami, M. Abe, T. Takeuchi, K. Arai, S. Saito, N. Furutake, T. Onodera, J. Kawahara, K. Kinoshita, N. Hata, T. Kikkawa, Y. Tsuchiya, K. Fujii, N. Oda, M. Sekine, and Y. Hayashi, “Feasibility Study of a Novel Molecular-Pore-Stacking (MPS), SiOCH Film in Fully-scale-down, 45nm-node Cu Damascene Interconnects,” 2005 Symposium on VLSI Technology Digest of Technical Papers (IEEE),pp. 18-19, 2005.
    21. ]R. Yagi, S. Chikaki, M. Shimoyama, T. Yoshino, T. Ono, A. Ishikawa, N. Fujii, N. Hata, T. Nakayama, K. Kohmura, H. Tanaka, T. Goto, J. Kawahara, Y. Sonoda, H. Matsuo, Y. Seino, K. Kinoshita, and T. Kikkawa, “Control of process-induced damages in self-assembled porous silica/Cu damascene interconnects for 45nm node and beyond,” 2005 Symposium on VLSI Technology Digest of Technical Papers (IEEE), pp. 146-147, 2005.
    22. S. Chikaki, A. Shimoyama, R. Yagi, T. Yoshino, T. Ono, A. Ishikawa, N. Fujii, N. Hata, T. Nakayama, K. Kohmura, H. Tanaka, T. Goto, J. Kawahara, Y. Sonoda, H. Matsuo, Y. Seino, S. Takada, N. Kunimi, Y. Uchida, S. Hishiya, Y. Shishida, K. Kinoshita, and T. Kikkawa, “Hybrid low-k/Cu dual damascene process for 45-32 nm technology node using self-assembled porous-silica ultra low-k films,” Proceedings of the IEEE 2005 IITC (IEEE), pp. 48-50, 2005.
    23. S. Takada, N. Hata, Y. Seino, N. Fujii, and T. Kikkawa, “Skeletal silica characterization in porous-silica low-dielectric-constant films by infrared spectroscopic ellipsometry,” Journal of Applied Physics (American Institute of Physics), Vol. 97, No. 11, pp. 113504-113508, 2005.
    24. T. Kikkawa, S. Kuroki, S. Sakamoto, K. Kohmura, H. Tanaka, and N. Hata, “Influence of Humidity on Electrical Characteristics of Self-Assembled Porous Silica Low-k Films,” Journal of the Electrochemical Society (The Electrochemical Society), Vol. 152, Iss. 7, G560-G566, 2005.
    25. K. Kinoshita, A. Nakano, N. Kunimi, M. Shimoyama, J. Kawahara, O. Kiso, Y. Seino, Y. Takasu, M. Komatsu, K. Nakamura, and T. Kikkawa, “Developments of Plasma Copolymerization Technique for Deposition of low-k Films,” Abstract Book of AVS 52nd International Symposium (American Vacuum Society), (Computational Publications), 2005.
    26. T. Ono, K. Kinoshita, H. Takahashi, N. Fujii, K. Kohmura, Y. Sonoda, R. Yagi, M. Shimoyama, N. Hata, and T. Kikkawa, “Recovery of Plasma Process Induced Damage in Porous Silica Low-k Films by Organosiloxane Vapor Post Annealing,” 2005 International Conference on IC Design & Technology (IEEE), Vol.8 12, pp. 43-48, 2005.
    27. N. Fujii, K. Yamada, Y. Oku, N. Hata, Y. Seino, C. Negoro, and T. Kikkawa, “Comparative Studies of Ultra Low-k Porous Silica Films with 2-D Hexagonal and Disordered Pore Structures,” Materials Research Society Symposium 2004 Spring Proceedings (Materials Research Society), Vol. 812, pp. 43-48, 2005.
    28. K. Kinoshita, A. Nakano, N. Kunimi, M. Shimoyama, J. Kawahara, H. Miyoshi, Y. Seino, Y. Takasu, R. Ichikawa, K. Komatsu, Y. Hayashi, and T. Kikkawa, “Reduction of dielectric constant in organic-based low-k films deposited by plasma copolymerization,” Proceedings of Advanced Metallization Conference (Material Research Society), pp. 451-456, ?2005.
    29. H. Miyoshi, N. Hata, and T. Kikkawa, “Theoretical Investigation into Effects of Pore Size and Pore Position Distributions on Dielectric Constant and Elastic Modulus of Two-Dimensional Periodic Porous Silica Films,” Japanese Journal of Applied Physics (Institute of Pure and Applied Physics) Vol. 44, No. 3, pp. 1166-1168, 2005.
    30. H. Miyoshi, H. Matsuo, H. Tanaka, K. Yamada, Y. Oku, S. Takada, N. Hata, and T. Kikkawa, “Theoretical Investigation of Dielectric Constant and Elastic Modulus of Two-Dimensional Periodic Porous Silica Films with Elliptical Cylindrical Pores,” Japanese Journal of Applied Physics (Institute of Pure and Applied Physics) Vol. 44, No. 3, pp. 1161-1165, 2005.
    31. T. Kikkawa, S. Chikaki, R. Yagi, Y. Shshida, N. Fujii, K. Takamra, H. Tanaka, T. Nakayama, S. Hishiya, T. Ono, T. Yamanishi, A. Ishikawa, N. Matsuo, Y. Seino, N. Hata, N. Yoshino, S. Takada, J. Kawahara, and K. Kinoshita, “Advanced Scalable Ultralow-k/Cu Interconnect Technology for 32 nm CMOS ULSI Using Self-Assembled Porous Silica and Self-aligned CoWP Barrier,” International Electron Devices Meeting 2005, pp. 99-102, Dec. 5, 2005.
    32. K. takamura, H. Tanaka, S. Ohike, M. Murakami, N. Fujii, S. Takada, T. Ono, Y. Seino, and T. Kikkawa, “A Novel Organosiloxane Vapor Annealing Process for Improving Properties of Porous Low-k Films,” 27th International Symposium on Dry Process, pp. 199-200, Nov. 29, 2005.
    33. K. Kinoshita, A. Nakano, N. Kunimi, M. Shimoyama, J. Kawahara, O. Kiso, H. Miyoshi, Y. Seino, Y. Takasu, R. Ichikawa, S. Komatsu, K. Nakamura, Y. Hayashi, and T. Kikkawa, “Developments of Plasma Copolymerization Technique for Deposition of low-k Films,” AVS 52nd International Symposium, pp. 113, Nov. 2, 2005.
    34. N. Fujii, K. Takamura, T. Nakayama, H. Tanaka, N. Hata, Y. Seino, and T. Kikkawa, “Fabrication of Mesoporous Silica for Ultra-low-k Interlayer Dielectrics,” Optics East 2005, pp. 71, Oct. 24, 2005.
    35. T. Kikkawa, R. Yagi, S. Chikaki, M. Shimoyama, T. Ono, N. Fujii, K. Takamura, H. Tanaka, T. Nakayama, A. Ishikawa, N. Matsuo, M. Sonoda, N. Hata, Y. Seino, N. Yoshino, and K. Kinoshita, “Self-assembled porous silica/Cu damascene interconnects for 45nm node and beyond,” Optics East 2005, pp. 71, Oct. 24, 2005.
    36. M. Shimoyama, R.Yagi, S. Chikaki, N. Fujii, T. Nakayama, K. Takamura, H. Tanaka, K. Kinoshita, and T. Kikkawa,　“Influence of Cu Electroplating Solutions on Leakage Current in Self-Assembled Porous Silica Low-k Films,” Advanced Metallization Conference 2005: 15th Asian Session, pp. 36-37, Oct. 13, 2005.
    37. A. Ishida, Y. Shishida, T. Yamanishi, N. Hata, T. Nakayama, N. Fujii, H. Tanaka, N. Matsuo, and T. Kikkawa, “Influence of CMP chemicals on the properties of porous silica low-k films.” Advanced Metallization Conference 2005, IX.3, Sep. 27, 2005.
    38. ]N. KUnishige, N. Hata, N. Fujii, and T. Kikkawa, “Comparison of Pore Shape Models for Small Angle X-ray Scattering of a ZDisordered Porous Silica Low-k film,” 2005 International Conference on Solid State Devices and Materials, pp. 292-293, Sep. 14, 2005.
    39. R. Yagi, S. Chikaki, M. Shimoyama, N. Yoshino, T. Ono, A. Ishikawa, N. Fuji, N. Hata, T. Nakayama, K. Takamura, H. Tanaka, T. Gotou, J. Kawahara, M. Sonoda, N. Matsuo, Y. Seino, K. Kinoshita, and T. Kikkawa, “Control of Process-Induced Damages in Self-Assembled Porous Silica /Cu Damascene Interconnects for 45nm Node and Beyond,”　2005 Symposium on VLSI Technology, pp. 146-147, Jun. 15, 2005.
    40. T. Kikkwa, Y. Oku, N. Fujii, K. Takamura, N. Hata,, Y. Seino, H. Miyoshi, Tanaka, A. Nakano, T. Gotou, A. Ishikawa, N. Matsuo, M. Sonoda, and K. Kinoshita, “Development of Porous Low-k Interlayer Dielectrics for 45 nm Technology Node,” 207th Meeting of The Electrochemical Society, Inc., Abs., pp. 723, May. 19, 2005.

    1.6. Wireless interconnects

    1. T. Kikkawa, K. Kimoto, and S. Watanabe, “Ultrawideband characteristics of fractal dipole antennas integrated on Si for ULSI wireless interconnects,” IEEE ELECTRON DEVICE LETTERS 26 (10), pp. 767-769, OCT. 2005.
    2. S. Akada, N. Hata, Y. Seino, N. Fujii, and T. Kikkawa, “Skeletal silica characterization in porous-silica low- dielectric-constant films by infrared spectroscopic ellipsometry,” JOURNAL OF APPLIED PHYSICS 97 (11), Art. No. 113504, JUN 1, 2005.
    3. P. K. Saha, N. Sasaki, and T. Kikkawa, “A CMOS monocycle pulse generation circuit in a ultra-wideband transmitter for intra/inter chip wireless interconnection,” JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS 44 (4B), pp. 2104-2108, APR. 2005.
    4. Rashid ABMH, Sultana N, Khan MR, and T. Kikkawa, “Efficient design of integrated antennas on Si for on-chip wireless interconnects in multi-layer metal process,” JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS 44 (4B), pp. 2756-2760, APR. 2005.
    5. K. Kimoto, and T. Kikkawa, “Transmission characteristics of Gaussian monocycle pulses for inter-chip wireless interconnections using integrated antennas,” JAPANESE JOURNAL OF APPLIED PHYSICS PART 1-REGULAR PAPERS SHORT NOTES & REVIEW PAPERS 44 (4B), pp. 2761-2765, APR. 2005.
    6. K. Kimoto, N. Sasaki, P. K. Saha, M. Nitta, T. Kikkawa and M. Sasaki, “Analysis of Transmission Characteristics of Gaussian Monocycle Pulse for Silicon Integrated Antennas,” Ext. Abst. of the 2005 International Conference on Solid State Devices and Materials, pp. 308-309, Kobe, September 13-15, 2005.
    7. P. K. Saha, N. Sasaki and T. Kikkawa, “A 2.4 GHz Differential Wavelet Generator in 0.18 μm CMOS for 1.4 Gbps UWB Impulse Radio in Wireless Inter/Intra-Chip Data Communication,” Ext. abst. of the 2005 International Conference on Solid State Devices and Materials, pp. 310-311, Kobe, September 13-15, 2005.
    8. K. Kimoto and T. Kikkawa, “Data Transmission Characteristics of Integrated Linear Dipole Antennas for UWB Communication in Si ULSI,” Proc. of IEEE AP-S International Symposium and USNC/URSI National Radio Science Meeting, Vol. 1B, pp. 678-681, Washington DC, July 3-8, 2005.
    9. M. Nitta, and T. Kikkawa, “Interference of Digital Noise with Integrated Dipole Antenna for Inter-chip Signal Transmission in ULSI,” Proc. of IEEE AP-S International Symposium and USNC/URSI National Radio Science Meeting, Vol. 3B, pp. 264-267, Washington DC, July 3-8, 2005.
    10. N. Sasaki, P. K. Saha and T. Kikkawa, “A Single Chip UWB Receiver based on 0.18-μm CMOS Technology,” Proceedings of 2005 International Workshop on UWB Technologies, pp. 46-50, Yokosuka, December 8-10, 2005.

    1.7. CVD and contamination/particle control

    1. M. Abdullah, I. W. Lenggoro, B. Xia, and K. Okuyama, “Novel Processing for Softly-Agglomerated Luminescent Y2O3:Eu3+ Nanoparticles using Polymeric Precursors,” J. Ceram. Soc. Jpn. (Spec. Issue - Innovative Ceramics), Vol. 113, No. 1, pp. 97-100, 2005.
    2. C. S. Kim, K. Nakaso, B. Xia, K. Okuyama, and M. Shimada, “A New Observation on the Phase Transformation of TiO2 Nanoparticles Produced by a CVD Method,” Aerosol Sci. Tech., Vol. 39, No. 2, pp.? 104-112, 2005.
    3. T. Yamaguchi, Y. Azuma, and K. Okuyama, “Development of Photon Correlation Spectroscopy Instrument for Size Analysis of Nanometer-Sized Particles of Below 10 nm,” J. Soc. Powder Technol., Japan, Vol. 42, No. 1, pp. 11-16, 2005. 山口哲司，阿妻靖史，奥山喜久夫 “シングルナノ粒子の粒径測定のための光子相関装置の開発,” 粉体工学会誌, Vol. 42, No. 1, pp. 11-16, 2005.
    4. Y. Hayashi, M. Shimada, H. Setyawan, K. Okuyama, and N. Kashihara, “Effects of Gas Flow Rate on Particulate Contamination in a PECVD Reactor,” J. Soc. Powder Technol., Japan, Vol. 42, No. 2, pp. 105-109, 2005. 林　豊，島田　学，Heru Setyawan，奥山喜久夫，柏原伸紀 “PECVD成膜装置内での粒子汚染現象に対する操作流量の影響,” 粉体工学会誌, Vo. 42, No. 2, pp. 105-109, 2005.
    5. M. Abdullah, K. Okuyama, I. W. Lenggoro, and S. Taya, “A Polymer Solution Process for Synthesis of (Y,Gd)3Al5O12:Ce Phosphor Particles,” J. Non-Cryst. Solids, Vol. 351, No. 8-9, pp. 697-704, 2005.
    6. H. K. Chang, I. W. Lenggoro, T. Ogi, and K. Okuyama, “Direct Synthesis of Barium Magnesium Aluminate Blue Phosphor Particles via a Flame Route,” Mater. Lett., Vol. 59, No. 10, pp. 1183-1187, 2005.
    7. S. H. Park, K. W. Lee, M. Shimada, and K. Okuyama, “Coagulation of Bipolarly Charged Ultrafine Aerosol Particles,” J. Aerosol Sci., Vol. 36, No. 7, pp. 830-845, 2005.?
    8. M. Shimada, H. M. Lee, C. S. Kim, H. Koyama, T. Myojo, and K. Okuyama, “Development of an LDMA-FCE System for the Measurement of Submicron Aerosol Particles,” J. Chem. Eng. Jpn., Vol. 38, No. 1, pp. 34-44, 2005.
    9. K. Nagato, C. S. Kim, M. Adachi, and K. Okuyama, “An Experimental Study of Ion-induced Nucleation using a Drift Tube Ion Mobility Spectrometer/Mass Spectrometer and A Cluster Differential Mobility Analyzer/Faraday Cup Electrometer,” J. Aerosol Sci., Vo. 36, No. 8, pp. 1036-1049, 2005.
    10. J. Suh, B. Han, K. Okuyama, and M. Choi, “Highly Charging of Nanoparticles through Electrospray of Nanoparticle Suspension,” J. Colloid Interface Sci., Vol. 287, No. 1, pp. 135-140, 2005.
    11. T. Morimoto, M. Yoshida, and K. Okuyama, “Synthesis of a Nanocomposite of Zr-Containing Nanoparticle/Poly(Ethylene Terephthalate) via Polymerization,” J. Soc. Mater. Sci. Jpn., Vol. 54, pp. 393-398, 2005, in Japanese.
    12. H. Habuka, K. Suzuki, S. Okamura, M. Shimada, and K. Okuyama, “Quartz Crystal Microbalance for Silicon Surface Organic Contamination,” J. Electrochem. Soc., Vol. 152, No. 4, pp. G241-G245, 2005.
    13. H. Setyawan, M. Shimada, Y. Hayashi, K. Okuyama, and S. Winardi, “Modeling of and Experiments on Dust Particle Levitation in the Sheath of a Radio Frequency Plasma Reactor,” J. Appl. Phys., Vol. 97 No. 4, pp. 043306-1-6, 2005.
    14. H. Setyawan, M. Shimada, Y. Hayashi, and K. Okuyama, “Removal of Particles during Plasma Processes Using a Collector based on the Properties of Particles Suspended in the Plasma,” J. Vac. Sci. Tech, Vol. A23, No. 3, pp. 388-393, 2005.
    15. H. M. Lee, C. S. Kim, M. Shimada, and K. Okuyama, “Effects of Mobility Change and Distribution of Bipolar Ions on Aerosol Nanoparticle Diffusion Charging,” J. Chem. Eng. Jpn., Vol. 38, No. 7, pp. 486-496,? 2005.
    16. M. Shimada, H. Setyawan, Y. Hayashi, N. Kashihara, K. Okuyama, and S. Winardi, “Incorporation of Dust Particles into a Growing Film during Silicon Dioxide Deposition from a TEOS/O2 Plasma,” Aerosol Sci. Techn., Vol. 39, No. 5, pp. 408-414, 2005.
    17. W. N. Wang, I. W. Lenggoro, Y. Terashi, T. O. Kim, and K. Okuyama, “One-step Synthesis of Titanium Oxide Nanoparticles by Spray Pyrolysis of Organic Precursors,” Mater. Sci. Eng. B., Vol. 123, No. 3, pp. 194-202, 2005.
    18. D. K. Song, I. W. Lenggoro, K. Okuyama, and S. S. Kim, “Changes in the Shape and Mobility of Colloidal Gold Nanorods with Electrospray and Differential Mobility Analyzer Methods,” Langmuir, Vol. 21, No. 23,? pp. 10375-10382, 2005.
    19. T. Morimoto, T. Nakayu, I. W. Lenggoro, and K. Okuyama, “Synthesis and morphology of zirconia particles derived from pyrolysis of polyethylene glycol-based polymeric precursor,” J. Soc. Powder Techn. Jpn., Vol. 42,? No. 10, pp. 688-693, 2005, in Japanese.
    20. H. Nakajima, S. Honda, M. Shimada, and K. Okuyama, “Study of life monitoring for a chemical air filter using quartz orystal microbalance method,” J. Aerosol Res., Jpn., Vol. 20, No. 3, pp. 220-224, 2005. 中島啓之，本田重夫，島田　学，奥山喜久夫, “QCMによるケミカルエアフィルタの寿命判定手法の検討,” エアロゾル研究, Vol. 20, No. 3, pp. 220-224, 2005.
    21. 片山和彦，三浦圭吾，北尾　智，島田　学，奥山喜久夫, “レーザ光散乱法によるたばこ主流煙の性状変化測定,” エアロゾル研究, Vol. 20, No. 4, pp. 345-351, 2005.
    22. K. Hayashi, T. Toda, and K. Okuyama, “Preparation of Composite Vivid Color Particles without Heavy Metal by Organic Yellow Pigment Coating,” Jpn. Sci. Colour. Mater, Vol. 78, No. 2, pp. 58-63, 2005.
    23. 島田学, 柏原伸紀, 林豊, 奥山喜久夫, 横山新, 池田弥央, “新規変調プラズマによるSiH4/H2プラズマリアクター内のダスト微粒子の抑制,”　エアロゾル研究, 第20巻, 第3号,　pp. 231-237, 2005.

    1.8. Atomic scale processes

    1. 近藤洋平, 中島健, 田中武, 高木俊宜, 渡邉悟志, 大倉健作, 芝原健太郎, 横山新, “プラズマベースイオン注入滅菌法における窒素イオンエネルギーの推定,” 真空, Vol. 48, No. 5, pp. 339-342, 2005.
    2. T. Tanaka, S. Watanabe, K. Shibahara, S. Yokoyama, and T. Takagi, “Plasma-based ion implantation sterilization technique and ion energy estimation,” J. Vac. Sci. Technol., A 23, No. 4, July/Aug., pp. 1018-1021, 2005.
    3. K. Ohkura, T. Kitade, and A. Nakajima, “Periodic Coulomb oscillation in Si single-electron transistor based on multiple islands,” J. Appl. Phys., Vol. 98, No. 12, Art. No.124503 (6 pages), Dec. 2005.

    2. Self-assembling techniques and quantum structures

    2.1. Silicon quantum dots and quantum electronics

    1. K. Makihara, J. Xu, M. Ikeda, H. Murakami, S. Higashi, and S. Miyazaki, “ Characterization of Electronic Charged States of P-doped Si Quantum Dots Using AFM/Kelvin Probe,” Abst. of The Fourth Int. conf. on Silicon Epitaxy and Heterostructures(ICSI-4), (Awaji Island, Hyogo, Japan, May 23-26, 2005), pp. 32-33, [23D-6].
    2. J. Nishitani, K. Makihara, M. Ikeda, H. Murakami, S. Higashi, and S. Miyzaki, “ Decay Characteristics of Electronic Charged States of Si Quantum Dots as Evaluated by an AFM/Kelvin Probe Technique,” Abst. of The Fourth Int. conf. on Silicon Epitaxy and Heterostructures(ICSI-4), (Awaji Island, Hyogo, Japan, May 23-26, 2005), pp. 294-295, [25P2-32].
    3. J. Nishitani, K. Makihara, Y. Darma, H. Murakami, S. Higashi, and S. Miyzaki, “ Experimental Evidence of Coulombic Interaction among Stored Charges in Single Si Dot as Detected by AFM/Kelvin Probe Technique,” 2005 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, (Seoul, Korea, June 28-30, 2005), pp. 177-180, [A9.4].
    4. T. Nagai, M. Ikeda, Y. Shimizu, S. Higashi, and S. Miyazaki, “ Characterization of MaltiStep Electron Charging to Silicon-Quantum-Dot Floating Gate by Applying Pulsed Gate Biases,” Ext. Abst. of The 2005 Int. Conf.on Solid State Devices and Materials, (Kobe, Sep. 13-15, 2005), pp. 174-175, [G-2-6].
    5. K. Makihara, Y. Kawaguchi, H. Murakami, S. Higashi, and S. Miyazaki, “ The Application of Maltiple-Stacked Si Quantum Dots to Light Emitting Diodes,” Abst. of 2005 Asia-Pacific Workshop on Fundamentals and Applications of Advanced Semiconductor Devices, (Seoul, Korea, June 28-30, 2005), pp. 173-176, [A9.3].
    6. K. Makihara, J. Xu, H.Deki, Y. Kawaguchi, H. Murakami, S. Higashi, and S. Miyazaki, “ Light Emitting Devices from Multilayered Si Quantum Dots Structures,” Abst. of 2005 Int. Meeting for Future of Electron Devices, (Kyoto, April 11-13, 2005), pp. 93-94, [P-D5].
    7. S. Miyazaki, “Control of Charged States of Silicon-Based Quantum Dots and Its Application to Floating Gate MOS Memories,” Abst. of First Int. Workshop on New Group IV Semiconductor Nanoelectronics, (Sendai, May 27-28, 2005), pp. 39-40, [Session V-2], (Invited).
    8. M. Ikeda, and S. Miyazaki, “Self-Assembling Formation of Si Quantum Dots and its Application to Floating Gate MOS Devices,” Japan-Korea Special Symp. On. Evaluation and Outlook of Oxide Nonvolatile Memories,” in The 16th Symp. of The Materials Research Society of Japan, (Tokyo, Dec. 9-11, 2005), [G2-I03-G], (Invited).
    9. S. Miyazaki, “Self-Assembling Formation of Si-based Quantum Dots and Control of Their Electric Charged States for Multi-valued Memories,” SPIE Conference on Nanofabrication: Technologies, Devices, and Applications II (SA111) at Optics East, (Boston, Oct.23-26, 2005), [No. OE05-SA111-41], (Invited).
    10. S. Miyazaki, “High Rate Growth of Crystalline Si and Ge Films from Inductively-Coupled Plasma,” SREN 2005 Int. conf. on Solar Renewable Energy News, Low Energy Buildings, Research of Historical Artifacts(Florence, Italy, April 2-8, 2005), [Section 1-1], (Invited).
    11. S. Miyazaki, “Control of Discrete Charged States in Si-Based Quantum Dots and Its Application to Floating Gate Memories,” Abst. of The 4th Int. Symp. Surface Science and Nanotechnology, (Omiya, November 14 - 17, 2005), pp. 540, [Th-A6(I)], (Invited).
    12. S. Miyazaki, “Electron charging and discharging characteristics of Si-based quantum dots floating gate,” Abst. of The Second Int. Symp. on Point Defects and Nonstoichiometry, (ISPN-2, Kaohsiung, Taiwan, Oct. 3-5, 2005), pp. 19, [Th-A1-1], (Invited).
    13. S. Miyazaki “Self-assembling formation of Silicon-based quantum dots and control of their electric charged states for multi-valued memories,” Abst. of 2006 RCIQE Int. Seminar for 21st Century COE Prog.: Quantum Nanoelectronics for Meme-Media-Based Information Technologies(IV), (Hokkaido, Feb. 9-10, 2006), pp. 41-44, (Invited).
    14. K. Makihara, H. Deki, H. Murakami, S. Higashi and S. Miyazaki, “Control of the nucleation density of Si quantum dots by remote hydrogen plasma treatment,” Appl. Surf. Sci., Vol. 244, No. 1-4, pp. 75-78, 2005.
    15. K. Makihara, Y. Okamoto, H. Murakami, S. Higashi and S. Miyazaki, “Characterization of germanium nanocrystallites grown on SiO2 by a conductive AFM probe technique,” IEICE Trans. on Electronics, Vol. E88-C, No. 4, pp. 705-708, 2005.
    16. S. Miyazaki, T. Shibaguchi and M. Ikeda, “Characterization of Electronic Charged States of Silicon Nanocrystals as a Floating Gate in MOS Structures,” Mat. Res. Soc. Symp. Proc., Vol. 830, pp. 249-254, 2005.
    17. T. Shibaguchi, M. Ikeda, H. Murakami and S. Miyazaki, “Charging and Discharging Characteristics of Stacked Floating Gates of Silicon Quantum Dots,” IEICE Trans. on Electronics, Vol. E88-C, No. 4, pp. 709-712, 2005.

    2.2. Transmission lines for THz applications

    1. K. Takase, T. Ohkubo, F. Sawada, D. Nagayama, J. Kitagawa, and Y. Kadoya, “Propagation Characteristics of Terahertz Electrical Signals on Micro-strip Lines Made of Optically Transparent Conductors,” Jpn. J. Appl. Phys., Vol. 44, No. 32, L1011-L1014, 2005.

    3. Technologies for intelligent systems

    1. H. Noda, K. Inoue, H.J. Mattausch, T. Koide, K. Dosaka, K. Arimoto, K. Fujishima, K. Anami, and T. Yoshihara, “Embedded Low-Power Dynamic TCAM Architecture with Transparently Scheduled Refresh,” IEICE Trans. on Electronics, vol. E88-C, pp. 622-629, 2005.4.
    2. T. Inoue, T. Hironaka, T. Sasaki, S. Fukae, T. Koide, and H.J. Mattausch, “Evaluation of a Bank-based Multi-port Memory Architecture with Blocking Network,” , “閉塞網を用いたオンチップバンク型多ポートメモリの検討と回路規模評価,” IEICE Trans. on Fundamentals of Electronics, Communications and Computer Science, vol. J88-A, pp. 498-510, 2005.4, (in Japanese).
    3. K. Inoue, H. Noda, K. Arimoto, H.J. Mattausch, and T. Koide, “A CAM-based signature-matching co-processor with application-driven power-reduction features,” IEICE Trans. on Electronics, vol. E88-C, pp. 1332-1342, 2005.6.
    4. T. Sasaki, T. Inoue, N, Omori, T. Hironaka, H.J. Mattausch, and T. Koide, “Chip Size and Performance Evaluations of Shared Cache for On-chip Multiprocessors,” Systems & Computers in Japan, No.36(9), pp. 1-13, 2005.9.
    5. T. Morimoto, Y. Harada, T. Koide, H.J. Mattausch, “Pixel-Parallel Digital-CMOS Implementation of Image-Segmentation by Region Growing,” IEE Proc. Circuits, Devices & Systems 152, pp. 579-589, 2005.12.
    6. T. Inoue, T. Hironaka, T. Sasaki, S. Fukae, T. Koide and H. J. Mattausch, “Evaluation of Bank based Multi-port Memory Architecture with Blocking Network,” Wiley, Systems & Computers in Japan, Vol.37, No.2, pp. 22-33, 2006.2.
    7. T. Morimoto, H. Adachi, O. Kiriyama, T. Koide, and H.J. Mattausch, “Boundary-Active-Only Adaptive Power-Reduction Scheme for Region-Growing Video Segmentation,” IEICE Trans. on Information & Systems, Vol. E89-D, pp. 1299-1302, 2006.3.
    8. T. Saito, M. Maeda, T. Hironaka, K. Tanigawa, T. Sueyoshi, K. Aoyama, T. Koide, and H.J. Mattausch, “Design of Superscalar Processor with Multi-Bank Register File,” Proc. IEEE Int. Symposium on Circuits and Systems (ISCAS’05), Kobe, pp. 3507-3510, 2005.5.
    9. T. Morimoto, O. Kiriyama, Y. Harada, H. Adachi, T. Koide, and H.J. Mattausch, “Object Tracking in Video Pictures based on Image Segmentation and Pattern Matching,” Proc. IEEE Int. Symposium on Circuits and Systems (ISCAS’05), Kobe , pp. 3215-3218, 2005.5.
    10. T. Kumaki, Y. Kuroda, T. Koide, H.J. Mattausch, H. Noda, K. Dosaka, K. Arimoto, and K. Saito, “CAM-based VLSI Architecture for Huffman Coding with Real-time Optimization of the
    11. A. Ahmadi, H.J. Mattausch, and T. Koide, “A Parallel Hardware Design for Snake Models with an FPGA Architecture,” International Workshop on Nonlinear Signal and Image Processing (NSIP’2005), pp. 146-150, 2005.5.
    12. T. Kumaki, Y. Kuroda, T. Koide, H.J. Mattausch, H. Noda, K. Dosaka, K. Arimoto, and K. Saito, “Multi-Port CAM based VLSI Architecture for Huffman Coding with Real-time Optimized Code Word Table,” Proceedings of the 48th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS‘2005), pp. 55-58, 2005.8.
    13. A. Ahmadi, Y. Shirakawa, Md. A. Abedin, K. Kamimura, H.J. Mattausch, and T. Koide, “An LSI hardware design for online character recognition using associative memory,” Proceedings of the 48th IEEE International Midwest Symposium on Circuits and Systems (MWSCAS‘2005), pp. 464-467, 2005.8.
    14. A. Ahmadi, Md. A. Abedin, H.J. Mattausch, and T. Koide, “A Parallel Hardware Design for Parametric Active Contour Models,” Proceedings of the IEEE International Conference on Advanced Video and Signal based Surveillance (AVSS‘2005), pp. 609-613, 2005.9.
    15. H. Adachi, T. Morimoto, K. Yamaoka, T. Koide, and H.J. Mattausch, “Image-Scan Architecture for Efficient FPGA/ASIC Implementation of Video-Segmentation by Region Growing,” Proceedings of the International SoC Design Conference (ISOCC’2005), pp. 301-304, 2005.11.
    16. Y. Kuroda, T. Kumaki, T. Koide, H.J. Mattausch, H. Noda, K. Dosaka, K. Arimoto, and K. Saito, “Highly Parallel Huffman Encoding by Exploiting Multiple Matches in Content Addressable Memory,” Proceedings of the International SoC Design Conference (ISOCC’2005), pp. 313-316, 2005.11.
    17. K. Yamaoka, T. Morimoto, H. Adachi, T. Koide, and H.J. Mattausch, “Image Segmentation and Pattern Matching Based FPGA/ASIC Implementation of Real-Time Object Tracking,” Proceedings of the Asia and South Pacific Design Automation Conference (ASP-DAC‘2006), pp. 176-181, 2006.1.
    18. M. Shiozaki, T. Mukai, M. Ono, M. Sasaki, and A. Iwata, “A 2.7 Gcps and 7-Multiplexing CDMA Serial Communication Chip Using Two-Step Synchronization Technique,” IEICE Trans. Electron., vol.E88-C, No.6, pp.1233-1240, June 2005.
    19. M. Shiozaki, T. Mukai, M. Ono, M. Sasaki, and A. Iwata, “A 2.7 Gcps and 7-Multiplexing CDMA Serial Communication Chip for Real-Time Robot Control with Multiprocessors,” Journal of Robotics and Mechatronics, vol. 17, No. 4, pp. 463-468, August 2005.
    20. T. Yoshida, M. Akagi, M. Sasaki, and A. Iwata, “A 1V Supply Successive Approximation ADC with Rail-to-Rail Input Voltage Range,” Proceedings of 2005 IEEE International Symposium on Circuits and Systems (ISCAS2005), pp. 192-195, Kobe, May 24, 2005.
    21. T. Yoshida, Y. Masui, T. Mashimo, M. Sasaki, and A. Iwata, “A 1V Supply 50nV/√Hz Noise PSD CMOS Amplifier Using Noise Reduction Technique of Autozeroing and Chopper Stabilization,” IEEE 2005 SYMPOSIUM ON VLSI CIRCUITS, Kyoto, June 16, 2005.
    22. K. Korekado, T. Morie, O. Noura, T. Nakano, M. Matsugu, and A. Iwata, “An Image Filtering Processor for Face/Object Recognition Using Merged/Mixed Analog-Digital Architecture,” IEEE 2005 SYMPOSIUM ON VLSI CIRCUITS, Kyoto, June 17, 2005.
    23. D. Kosaka, M. Nagata, Y. Hiraoka, I. Imanishi, M. Maeda, Y. Murasaka, and A. Iwata, “Isolation Strategy against Substrate Coupling in CMOS Mixed-Signal/RF Circuits,” IEEE 2005 SYMPOSIUM ON VLSI CIRCUITS, Kyoto, June 17, 2005.
    24. M. Sasaki, and A. Iwata, “A 0.95mW/1.0Gbps Spiral-Inductor Based Wireless Chip-Interconnect with Asynchronous Communication Scheme,” IEEE 2005 SYMPOSIUM ON VLSI CIRCUITS, Kyoto, June 17, 2005.
    25. M. Hori, M. Ueda, and A. Iwata, “A Stochastic Computing Chip for Measurement of Manhattan distance,” Ext. Abst. of the 2005 International Conference on Solid State Devices and Materials, Kobe, pp. 316-317, 2005.
    26. M. Shiozaki, M. Sasaki, A. Mori, A. Iwata, and H. Ikeda, “20GHz Uniform-Phase Uniform-Amplitude Standing-Wave Clock Distribution,” IEICE Electronics Express (FLEX), Vol.3, No.2, pp.11-16, 2006
    27. K. Sasaki, S. Kameda, and A. Iwata, “Stereo Matching Algorithm Using a Weighted Average of Costs Aggregated by Various Window Sizes,” 7th Asian Conference on Computer Vision, Proceedings Part II, pp. 771-780, Hyderabad in India, Jan. 13-16, 2006.
    28. 岩田穆，亀田成司, “生命体情報処理とエレクトロニクスの融合,” 応用物理, Vol. 74, No. 7, pp. 884-889, 2005.
    29. A. Iwata, M. Sasaki, T. Kikkawa, S. Kameda, H. Ando, K. Kimoto, D. Arizono, and H. Sunami, “A 3D Integration Scheme utilizing Wireless Interconnections for Implementing Hyper Brains,” 2005 IEEE International Solid-State Circuits Conference, pp. 262-263, San Francisco, CA, February 6-10, 2005.