研究グループ別主要論文

岩田・佐々木グループ主要論文 A. Iwata, M. Sasaki, T. Kikkawa, S. Kameda, H. Ando, K. Kimoto, D. Arizono, and H. Sunami, "A 3D Integration Scheme utilizing Wireless Inter- connections for Implementing Hyper Brains," Internat. Solid-State Circuits Conf. Dig. Tech. Papers, Abs. No. 14.4, pp. 262-263, 2005. PDF[1.0MB] M. Sasaki, “Design of a Millimeter-Wave CMOS Radiation Oscillator With an Above-Chip Patch Antenna,”IEEE Trans. Circuits Syst. II, Vol. 53, No.10, pp.1128-1132, 2006. PDF[1.2MB] S. Kameda and T. Yagi, "An Analog Silicon Retina With Multichip Confi- guration," IEEE Trans. Neural Networks, Vol.17, No.1, pp.197-210, 2006. PDF[1.3MB] T. Yoshida, Y. Mashimo, M. Akagi, A. Iwata, M. Yoshida, and K. Uematsu, "A Design of Neural Signal Sensing LSI with Multi-Input-Channels," IEICE Trans. Fundamentals, Vol. E87-A, No. 2, pp. 376-383, 2004. PDF[1.0MB] H. Ando, T. Morie, M. Miyake, M. Nagata and A. Iwata, “Image Segmenta- tion/Extraction Using Nonlinear Cellular Networks and their VLSI Implementation Using Pulse-Modulation Techniques," IEICE Trans. Fundamentals, Vol. E85-A, No. 2, pp. 381-388, 2002. PDF[1.2MB] M. Shiozaki, T. Mukai, M. Ono, M. Sasaki, and A. Iwata, "A 2.7 Gcps and 7-Multiplexing CDMA Serial Communication Chip for Real-Time Robot Control with Multiprocessors,”J. Robotics and Mechatronics, Vol. 17, No.4, pp. 1-6, 2005. PDF[387KB] K. Sasaki, T. Morie, and A. Iwata, "A VLSI Spiking Feedback Neural Network with Negative Thresholding and Its Application to Associative Memory," IEICE Trans. Electron., Vol. E89-C, No. 11, pp. 1637-1644, 2006. PDF[994KB] T. Yoshida, Y. Masui, T. Mashimo, M. Sasaki, and A. Iwata, "A 1 V Low- Noise CMOS Amplifier Using Autozeroing and Chopper StabilizaTechnique," IEICE Trans. Electron., Vol. E89-C, No. 6, pp. 769-774, 2006. PDF[1.0MB] M. Shiozaki, T. Mukai, M. Ono, M. Sasaki, and A. Iwata, "A 2.7 Gcps and 7-Multiplexing CDMA Serial Communication Chip Using Two-Step Syn- chronization Technique," IEICE Trans. Electron., Vol. E88-C, No. 6, pp. 1233- 1240, 2005. PDF[1.3MB] マタウシュ・小出グループ主要論文 T. Morimoto, Y. harada, T. Koide, and H. J. Mattausch, "Pixel-parallel digital CMOS implementation of image segmentaation by region growing," IEE Proc.-Circuits Devices. Syst., Vol. 152, No. 6, pp. 579-589, 2005. PDF[2.3MB] K. Johguchi, Y. Mukuda, K. Aoyama, H. J. Mattausch, and T. Koide, "A 2-stage-pipelined 16 port SRAM with 590 Gbps random access bandwidth and large noise margin," IEICE Electronics Express, Vol. 4, No. 2, pp. 21-25, 2007. PDF[1.1MB] T. Kumaki, Y. Kono, M. Ishizaki, T. Koide, and H. J. Mattausch, "Scalable FPGA/ASIC Implementation Architecture for Paralle Table-Lookup-Coding Using Multi-Ported Content Addressable Memory," IEICE Trans. Inf. & Syst., Vol. E90-D, No. 1, pp. 346-354, 2007. PDF[1.6MB] 三浦・江崎グループ主要論文 M. Miura-Mattausch, N. Sadachika, D. Navarro, G. Suzuki, Y. Takeda, H. J. Mattausch, T. Ohguro, T. Iizuka, M. Taguchi, S. Kumasiro, and S. Miyamoto, "HiSIM2:Advanced MOS, FET Model Valid for RF Circuit Simulation," IEEE Trans. ED, Vol. 53, No. 9, pp. 1994-2007, 2006. PDF[959KB] K. Konno, O. Matsumoto, D. Navarro, and M. Miyra-Mattausch, "High frequency response of p-i-nphotodiodes analysed by an analytical model in Fourier space," J. Appl. Phys., Vol. 96, No. 7, pp. 3839-3844, 2004. PDF[297KB] N. Sadachika, D. Kitamaru, Y. Uetsuji, D. Navarro, M. M. Yusoff, T. Ezaki, H. J. Mattausch, and M. Miura-Mattausch, "Cpompletely Surface-Potential- Based Compact Model of the Fully Depleted SOI-MOSFET Including Short-Channel Effects," IEEE Trans. ED, Vol. 53, No. 9, pp. 2017-2024, 2006. PDF[550KB] 芝原グループ主要論文 K. Shibahara, T. Eto, and K. Kurobe, "Merits of Heat-assist for Melt Laser Annealing," IEEE Trans. Electron Devices, Vol. 53, No. 5, pp. 1059-1064, 2006. PDF[435KB] [Sh-9] K. Sano, M. Hino, N. Ooishi, and K. Shibahara, "Workfunction Tuning Using Various Impurities for Fully Silicided NiSi," Jpn. J. Appl. Phys. Part 1., Vol. 44, No. 6A, pp. 3774-3777, 2005. PDF[166KB] 角南グループ主要論文 H. Sunami, S. Matsumura, K. Yoshikawa, and K. Okuyama, "High-aspect-ratio structure formation techniques for three-dimensional metal-oxide-semiconductor transistors," Microelectronic Engineering, Vol. 83, pp. 1740-1744, March 2006. PDF[978KB] K. Okuyama, K. Yoshikawa, and H. Sunami, “Subthreshold-Characteristics Control of Narrow- channel SOI nMOS Transistor Utilized Additional Side Gate Electrodes,” to be published in Jpn. J. Appl. Phys., Vol. 46, April 2007. PDF[227KB] 宮崎・東グループ主要論文 S. Miyazaki, A. Ohta, S. Inumiya, Y. Nara, and K. Yamada, "Depth Profiling of Chemical and Electronic Structures and Defects of Ultrathin HfSiON on Si(100), " ECS Trans. 3(3), pp. 171-180, 2006. PDF[552KB] S. Miyazaki, M. Ikeda, and K. Makihara, "CHaracterization of Electronic Charged Styates of Si-Based Quantum Dots and Their Application to Floating GAte Memories," ECS Trans. 2(1), pp. 157-164, 2006. PDF[332KB] S. Higashi, H. Kaku, T. Okada, H. Murakami, and S. Miyazaki, "Crystalli-zation of Si in Millisecond Time Domain Induced by Thermal Plasama Jet Irradiation," Jpn. J. Appl. Phys., Vol. 45, No. 5B, pp 4313-4320, 2006. PDF[379KB] K. Makihara, J. Xu, M. Ikeda, H. Murakami, S. Higashi, and S. Miyazaki, "Characterization of electronic charged states of P-doped Si quantum dots using AFM/Kelvin probe," Thin Solid Films 508, pp. 186-189, 2006. PDF[424KB] Y. Darma, H. Murakami, and S. Miyazaki, "Influence of thermal annealing on compositional mixing and crystallinity of highly selective grown Si dots with Ge core," Appl. Surf. Sci. 224, pp. 156-159, 2004. PDF[207KB] 吉川グループ主要論文 T. Kikkawa, S. Kuroki, S. Sakamoto, K. Kohmura, H. Tanaka, and N. Harta, "Influence of Humidity on Electrical Characteristics of Self-Assembled Porous Silica Low-k films," J. Electrochem. Soc., Vo. 152, pp. G560-G566, 2005. PDF[603KB] T. Kikkawa, K. Kimoto, and S. Watanabe, "Ultrawideband Characteristics of Fractal Dipole Antennas Integrated on Si for ULSI Wireless Interconnects," IEEE Electron Device Lett., Vol. 26, No. 10, pp. 767-769, 2005. PDF[249KB] P. K. Saha, N. Sasaki, K. Kimoto, and T. Kikkawa, "A 2.4GHz Differential Wavelet Generator on 0.18mm Complementary Metal-Oxide-Semiconductor for 1.4 Gbps Ultra-Wideband Impulse Radio in Wireless Inter/Intra-Chip Data Communication," Jpn. J. Appl. Phys., Vol. 45, No. 4B, pp. 3279-3285, 2006. PDF[273KB] 横山グループ主要論文 Y. Tanushi and S. Yokoyama, "Design and Simulation of Ring Resonator Optical Switches using Electro-Optic Materials," Jpn. J. Appl. Phys., Vol. 45, No. 4B, pp. 3493-3497, 2006. PDF[301KB] Z. Xu, M. Suzuki, Y. Tanushi, and S. Yokoyama, "Monolithically integrated optical modulator based on polycrystalline BaSrTiO thin fils," Appl. Phys. Lett. 88, 161107, 2006. PDF[327KB] M. Suzuki, K. Nagata, Y. Tanushi, and S. Yokoyama, "Transient REsponse in Monolithic Mach-Zehender Optical Modulator Using (Ba, Sr)TiO3 Film Sputtered at Low Temperature on SIlicon, Jpn. J. Appl. Phys., Vol. 46, No. 4B, in press April 2007. PDF[693KB] 中島グループ主要論文 A. Nakajima, T. Ohashi, S. Zhu, S. Yokoyama, S. Michimata, and H. Miyake, "Atomic-Layer-Deposited Si-Nitride/SiO2 Stack Gate Dielectrics fort Fuiture High-Speed DRAM With Enhanced Reliability," IEEE Electron Devices Lett., Vo. 26, No. 8, pp. 538- 540, 2005. PDF[116KB] S. Zhu, A. Nakajima, T. Ohashi, and H. Miyake, "Mechanism of Dynamic Bias Temperature Instability in p- and nMOSFETs:The Effect of Pulse Waveform," IEEE Trans. ED, Vol. 53, No. 8, pp. 1805-1814, 2006. PDF[1.4MB]