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■第4回COEワークショップ論文集 2005/9/16

PDF[105.1MB]

Cover PDF[163KB]
Inner cover PDF[57KB]
Preface PDF[47.4KB]
Contents

PDF[50.2KB]

PLENARY SESSION

Recent Progress of the COE
Atsushi Iwata, COE Leader, Graduate School of Advanced Sciences and Matter, Hiroshima University

PDF[3.2MB]

[Invited] Challenges and Opportunitie
Tadahiro Kuroda, Keio University, Japan

PDF[4.3MB]
[Invited] High-k Gate Dielectrics for Future CMOS Technology
T.P.Ma, Yale University. USA
PDF[2.9MB]

[Invited] Sub-20 nm Novel Silicon-Based Transistors
J.C.S. Woo, UCLA, USA

PDF[2.5MB]

[Invited] Perspective on Emerging Devices and their Impact on Scaling Technologies
S. Biesemans, IMEC

PDF[9.7MB]

[Invited] Device Simulation for Nano MOSFET and Scaing Issues
Y. J. Park, Seoul National University, Korea

PDF[2.2MB]

[Invited] Conventional Bulk and Bulk+ Architectures for 45 nm Node
F. Boeuf, ST Microelectronics, France

PDF[6.0MB]
[Invited] Current Status of PVD Hf-Based High-k Gate Stack
- Process Improvement on Drive Current
Masaaki Niwa,  Matsushita Electric, Japan
PDF[2.1MB]
Current Activities in Device and Process R&D of the COE
Hideo Sunami, S. Miyazaki, S. Yokoyama, K. Shibahara, and
A. Nakajima Hiroshima University
PDF[7.4MB]
POSTER SESSION

P-01 A 3D Integration Architecture utilizing Wireless Interconnections for Implementing Hyper Brains
Atsushi Iwata, Mamoru Sasaki, Takeshi Yoshida, Seiji Kameda, Hiroshi Ando, Masahiro Ono,Kanya Sasaki, Daisuke Arizono, and Takamaro Kikkawa

PDF[523.5KB]

P-02 A 0.95mW/1.0Gbps Spiral-Inductor Based Wireless Chip-Interconnect with Asynchronous Communication Scheme
Mamoru Sasaki and Atsushi Iwata

PDF[677.6KB]

P-03  A brain-type vision system using a 3-dimensional integration with local and global wireless interconnections
Seiji Kameda, Nobuo Sasaki, Daisuke Arizono, Masaki Odahara, Mamoru Sasaki, Takamaro Kikkawa, and Atsushi Iwata

PDF[3.5MB]

P-04  Robust Face Recognition Methods under Illumination Variations toward Hardware Implementation on 3DCSS
H. Ando, N. Fuchigami, M. Sasaki, and A. Iwata

PDF[3.1MB]

P-05  A Layout Method of 20GHz Global Clock Distribution
Mitsuru Shiozaki, Atsushi Mori, Atsushi Iwata, and Mamoru Sasaki

PDF[3.4MB]

P-06  A Robust Modular Learning Model with Addition and Integration of Modules
Masahiro Ono, Mamoru Sasaki, and Atsushi Iwata

PDF[283.2KB]

P-07  A window-based stereoscopic system using a weighted average of costs aggregated with window size reduction
Kan'ya Sasaki, Seiji Kameda, and Atsushi Iwata

PDF[170.3KB]

P-08  A CMOS RF Front-End using Radiation Oscillator for Short-Range Wireless Communication
Toru Mukai, Atsushi Iwata, and Mamoru Sasaki

PDF[1005.8KB]

P-09 A 1V Supply Low noise CMOS Amplifier Using Noise Reduction Technique of Autozeroing and Chopper Stabilization
Yoshihiro Masui, Takeshi Yoshida, Takayuki Mashimo, Mamoru Sasaki, and Atsushi Iwata

PDF[515.2KB]

P-10 Systems with Recognition and Learning Capability Based on Associative Memory
Hans Juergen Mattausch and Tetsushi Koide

PDF[2.2MB]

P-11 Real-Time Multi-Object Tracking Based on Highly Parallel Image Segmentation and Pattern Matching
Tetsushi Koide, Hans Juergen Mattausch, Takashi Morimoto, Hidekazu Adachi, and Kosuke Yamaoka

PDF[1.2MB]

P-12 Associative Memory Based Hardware Design for an OCR System and Prototyping with FPGA
Ali Ahmadi, Md. Anwarul Abedin, Kazuhiro Kamimura, Yoshinori Shirakawa, Kazuhiro Takemura,Hans Juergen Mattausch, and Tetsushi Koide

PDF[2.3MB]

P-13 Fully-Parallel Associative Memory Architecture Realizing Minimum Euclidean Distance Search
Md. Anwarul Abedin, Kazuhiro Kamimura, Ali Ahmadi, Hans Juergen Mattausch, and Tetsushi Koide

PDF[304.6KB]

P-14 Image-Scan Video Segmentation Architecture Based on Embedded Memory Technology
Takashi Morimoto, Hidekazu Adachi, Kosuke Yamaoka, Tetsushi Koide, and Hans Juergen Mattausch

PDF[471.8KB]

P-15 CAM-Based Huffman Coding Architecture for Real-Time Applications
Takeshi Kumaki, Yasuto Kuroda, Tetsushi Koide, Hans Juergen Mattausch, Hideyuki Noda,Katsumi Dosaka, Kazutami Arimoto, and Kazunori Saito

PDF[265.9KB]

P-16 Unified Data/Instruction Cache with Distributed Crossbar, Hidden Precharge Pipeline and Dynamic CMOS Logic
Koh Johguchi, Zhaomin Zhu, Ken-ichi Aoyama, Yuya Mukuda, Hans Juergen Mattausch,Testushi Koide, and Tetsuo Hironaka

PDF[591.0KB]

P-17 Time-Domain-Based Modeling of Carrier Transport in Lateral p-i-n Photodiode
G. Suzuki, K. Konno, D. Navarro, N. Sadachika Y. Mizukane, O. Matsushima, T. Ezaki,Mitiko Miura-Mattausch, and S. Yokoyama Dondee Navarro and Mitiko Miura-Mattausch

PDF[701.9KB]

P-18 Shot Noise Modeling in MOSFETs under Sub-threshold Condition
Yoshioki Isobe, Dondee Navarro, Youichi Takeda, Kiyohito Hara, Tatsuya Ezaki, and Mitiko Miura-Mattausch

PDF[689.3KB]

P-19   Wireless interconnects for UWB signal transmission in ULSIs Interconnection
T. Kikkawa, N. Sasaki, P. K. Saha, K. Kimoto, and M. Nitta

PDF[300.8KB]

P-20  The Development of UWB Gaussian Monocycle Pulse Synchronization Circuit based on 0.18μm CMOS Technology
Nobuo Sasaki, Pran Kanai Saha, and Takamaro Kikkawa

PDF[871.1KB]

P-21  Effect of Supercritical Fluid Extraction Process on Self-assembled Porous Silica Films
Kouji Isari, Nobuyuki Kawakami, Yoshito Fukumoto, and Takamaro Kikkawa

PDF[2.4MB]

P-22  Impulse-based UWB transmitter in 0.18 μm CMOS for wireless interconnect in future ULSI
P. K. Saha, N. Sasaki, and T. Kikkawa

PDF[416.2KB]

P-23  Data Transmission Characteristics of Integrated Linear Dipole Antennas for UWB Communication in Si ULSI
K. Kimoto, N. Sasaki, M. Nitta, and T. Kikkawa

PDF[857.2KB]

P-24  Interference of Digital Noise with Integrated Dipole Antenna for Inter-chip Signal Transmission In ULSI
M. Nitta and T. Kikkawa

PDF[703.2KB]

P-25 Front-End Technologies for nano-scale MOSFETs
Kentaro Shibahara

PDF[686.0KB]

P-26 Workfunction Tuning of Fully-Silicided NiSi Gate with Poly-Si Predoping
Takuji Hosoi, Kousuke Sano, Masaki Hino, Norihiro Ooishi, and Kentaro Shibahara

PDF[764.6KB]

P-27 Development of Three-Dimensional Beam-Channel MOS Transistors
Hideo Sunami, Kei Kobayashi, Shunpei Matsumura, Koji Yoshikawa, and Kiyoshi Okuyama

PDF[1.8MB]

P-28 Constraint of Source/Drain Formation with Plasma Doping Applied for Beam Channel Transistor on SOI
Kei Kobayashi, Kiyoshi Okuyama, Koji Yoshikawa, and Hideo Sunami

PDF[1.3MB]

P-29  Characterization of Newly Developed 3-D Parallel-Triple Gate MOS Transistor
Kiyoshi Okuyama, Koji Yoshikawa, and Hideo Sunami

PDF[4.7MB]

P-30 Control of Charged States of Silicon Quantum Dots and Their Application to Floating Gate MOS Memories and Light Emitting Diodes
Seiichi Miyazaki

PDF[2.8MB]

P-31 Impact of Rapid Thermal Annealing on ALCVD-Al2O3/Si3N4/Si(100) StackStructures --Photoelectron Spectroscopy
H. Murakami, F. Takeno, A. Ohta, S. Higashi , S. Miyazaki, K. Komeda, M. Horikawa, and K. Koyama

PDF[1.3MB]

P-32  Formation of Si Nano-crystals by Millisecond Annealing of SiOx Films using Thermal Plasma Jet
Seiichiro Higashi, Tatsuya Okada, Noto Fujii, Naohiro Koba, Hideki Murakami, and Seiichi Miyazaki

PDF[616.5KB]

P-33  Fabrication of Multiply-Stacked Structures Consisting of Si-QDs with Ultrathin SiO2 and Its Application of Light Emitting Diodes
Katsunori Makihara, Yoshihiro Kawaguchi, Hideki Murakami, Seiichiro Higashi, and Seiichi Miyazaki

PDF[3.7MB]

P-34  Characterization of Electronic Charged States of P-doped Si Quantum Dots Using AFM/Kelvin Probe
Katsunori Makihara, Hideki Murakami, Seiichiro Higashi, and Seiichi Miyazaki

PDF[4.9MB]

P-35  Characterization of Charge Trapping and Dielectric Breakdown of HfAlOx/SiON Dielectric Gate Stack
Yanli Pei, Satoru Nagamachi, Hideki Murakami, Seiichiro Higashi, Seiichi Miyazaki,Takaaki Kawahara, Kazuyoshi Torii, and Yasuo Nara

PDF[1.7MB]

P-36  Characterization of Chemical Bonding Features of NH3-Annealed Hafnium Oxides Formed on Si(100)
H. Nakagawa, A. Ohta, H. Murakami, S. Higashi, and S. Miyazaki

PDF[1.4MB]

P-37 XPS Study of Ultrathin GeO2/Ge System
Akio Ohta, Hiroaki Furukawa, Hiroshi Nakagawa, Hideki Murakami, Seiichiro Higashi, and Seiichi Miyazaki

PDF[1.1MB]

P-38  Phase Transformation of Amorphous Si Films in Millisecond Time Domain Induced by Thermal Plasma Jet Irradiation
H. Kaku, S. Higashi, T. Okada, H. Murakami, and S. Miyazaki

PDF[2.9MB]

P-39  Characterization of Multi Step Electron Charging to Silicon-Quantum-Dot Floating Gate by Applying Pulsed Gate Biases
T. Nagai, M. Ikeda, Y. Shimizu, S. Higashi, and S. Miyazaki

PDF[2.5MB]

P-40  Decay Characteristics of Electronic Charged States of Si Quantum Dots as Evaluated by an AFM/Kelvin Probe Technique
Junichiro Nishitani, Katsunori Makihara, Mitsuhisa Ikeda, Hideki Murakami, Seiichiro Higashi,and Seiichi Miyazaki

PDF[2.3MB]

P-41  Analysis of Transient Temperature Profile During Thermal Plasma Jet Annealing of Si Films on Quartz Substrate
T. Okada, S. Higashi, H. Kaku, N. Koba, H. Murakami, and S. Miyazaki

PDF[881.5KB]

P-42  Status of Research on Optical Interconnection in LSI
Shin Yokoyama

PDF[1.0MB]

P-43  Design and Simulation of Ring Resonator Optical Switches using Electro- and Magneto-Optic Materials
Yuichiro Tanushi and Shin Yokoyama

PDF[641.9KB]

P-44  Groove-Buried Optical Waveguides Based on Metal Organic Solution-Derived Ba0.7Sr0.3TiO3Thin Films
Zhimou Xu, Masato Suzuki, Yuichiro Tanushi, Keita Wakushima, and Shin Yokoyama

PDF[840.9KB]

P-45  Structural and Optical Properties of Electro-Optic Material: Sputtered (Ba,Sr)TiO3
Masato Suzuki, Zhimou Xu, Yuichiro Tanushi, and Shin Yokoyama

PDF[1.9MB]

P-46  Integration of High-Speed Photodetectors on Si LSI
Masayuki Kitaura, Yoshio Mizukane, Shin Yokoyama, and Mitiko Miura-Mattausch

PDF[203.5KB]

P-47 Development of Photodetectors using Si Quantum Dots
Mitsuhisa Ikeda, Masayuki Kitaura, Seiichi Miyazaki, and Shin Yokoyama

PDF[214.8KB]

P-48 Fabrication of Spin-Coat Optical Waveguides for Optically Interconnected LSI and Influence of Fabrication Process on Lower Layer MOS Capacitors
Tetsuo Tabei, Kazuhiko Maeda, Shin Yokoyama, and Hideo Sunami

PDF[428.1KB]

P-49 Smooth Cu Thin Film Fabricated by H2 Addition Sputtering
Masahiro Ooka and Shin Yokoyama

PDF[161.1KB]

P-50 Characterization and application of SiON gate dielectrics
Anri Nakajima, Shiyang Zhu, Takuo Ohashi, and Hideharu Miyake

PDF[123.5KB]

P-51 Infuence of Bulk Bias on Negative Bias Temperature Instability of pMOSFETs with Ultrathin Plasma-Nitrided Gate Oxide
Shiyang Zhu, Anri Nakajima, Takuo Ohashi, and Hideharu Miyake
PDF[243.9KB]
P-52 [Invited] Dynamic Behavior of Human Eye
Roland Kempf, Yuichi Kurita, Yoshichika Iida, Makoto Kaneko, Hiromu Mishima,Hidetoshi Tsukamoto, and Eiichiro Sugimoto
PDF[1.3MB]
Back cover PDF[53.8MB]